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Synchronize codes for OnePlus 8 Oxygen OS 11.IN21DA and OnePlus 8 Pro Oxygen OS 11.IN11DA

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Change-Id: Ibb370715a3a3ef9eb60a3974141714e18d6925b8
This commit is contained in:
kim.ba 2020-09-27 17:05:18 +08:00
parent b619cde72c
commit 7d4a14372e
1848 changed files with 849086 additions and 1471 deletions
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9
.gitignore vendored
View File

@ -137,7 +137,12 @@ all.config
kernel/configs/android-*.cfg
# vendor device tree directories
arch/arm64/boot/dts/vendor/
#arch/arm64/boot/dts/vendor
#drivers/oneplus/
#include/linux/oem
# Tech package directories
techpack/
#techpack/
# OP SLA feature
#opslalib/slalib

9
Makefile
View File

@ -418,6 +418,7 @@ LINUXINCLUDE := \
-I$(objtree)/arch/$(SRCARCH)/include/generated \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
-I$(objtree)/include \
-I$(srctree)/drivers/oneplus/include \
$(USERINCLUDE)
KBUILD_AFLAGS := -D__ASSEMBLY__
@ -436,6 +437,12 @@ KBUILD_LDFLAGS :=
GCC_PLUGINS_CFLAGS :=
CLANG_FLAGS :=
ifeq ($(filter instantnoodle%, $(OEM_TARGET_PRODUCT)),)
KBUILD_CFLAGS += -DUFS3V1
else
KBUILD_CFLAGS += -DUFS3V0
endif
export ARCH SRCARCH CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM STRIP OBJCOPY OBJDUMP KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS
export MAKE LEX YACC AWK GENKSYMS INSTALLKERNEL PERL PYTHON PYTHON2 PYTHON3 UTS_MACHINE
@ -590,7 +597,7 @@ export KBUILD_MODULES KBUILD_BUILTIN
ifeq ($(KBUILD_EXTMOD),)
# Objects we will link into vmlinux / subdirs we need to visit
init-y := init/
drivers-y := drivers/ sound/ firmware/ techpack/
drivers-y := drivers/ sound/ firmware/ techpack/ opslalib/
net-y := net/
libs-y := lib/
core-y := usr/

5
arch/arm64/boot/dts/vendor/Makefile vendored Normal file
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@ -0,0 +1,5 @@
vendor := $(srctree)/$(src)
ifneq "$(wildcard $(vendor)/qcom)" ""
subdir-y += qcom
endif

111
arch/arm64/boot/dts/vendor/qcom/Makefile vendored Executable file
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@ -0,0 +1,111 @@
dtbo-$(CONFIG_ARCH_KONA) += \
instantnoodlep-overlay-evb.dtbo \
instantnoodlep-overlay-t0.dtbo \
instantnoodlep-overlay-evt1.dtbo \
instantnoodlep-overlay-dvt.dtbo \
instantnoodle-overlay-t0.dtbo \
instantnoodle-overlay-evt1.dtbo \
instantnoodle-overlay-dvt.dtbo \
instantnoodlev-overlay-t0.dtbo \
instantnoodlev-overlay-evt1.dtbo \
instantnoodlev-overlay-dvt.dtbo
instantnoodlep-overlay-evb.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlep-overlay-t0.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlep-overlay-evt1.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlep-overlay-dvt.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodle-overlay-t0.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodle-overlay-evt1.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodle-overlay-dvt.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlev-overlay-t0.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlev-overlay-evt1.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
instantnoodlev-overlay-dvt.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
dtbo-$(CONFIG_ARCH_BENGAL) += \
bengal-rumi-overlay.dtbo \
bengal-qrd-overlay.dtbo \
bengal-idp-overlay.dtbo \
bengal-idp-usbc-overlay.dtbo \
bengalp-idp-overlay.dtbo \
bengal-idp-1gb-overlay.dtbo \
bengal-idp-2gb-overlay.dtbo \
bengal-idp-usbc-1gb-overlay.dtbo \
bengal-idp-usbc-2gb-overlay.dtbo \
qcm4290-iot-idp-overlay.dtbo \
qcs4290-iot-idp-overlay.dtbo \
qcm4290-iot-idp-1gb-overlay.dtbo \
qcm4290-iot-idp-2gb-overlay.dtbo \
qcm4290-iot-idp-usbc-1gb-overlay.dtbo \
qcm4290-iot-idp-usbc-2gb-overlay.dtbo \
qcm4290-iot-idp-usbc-overlay.dtbo
bengal-rumi-overlay.dtbo-base := bengal.dtb
bengal-qrd-overlay.dtbo-base := bengal.dtb
bengal-idp-overlay.dtbo-base := bengal.dtb
bengal-idp-usbc-overlay.dtbo-base := bengal.dtb
bengalp-idp-overlay.dtbo-base := bengalp.dtb
bengal-idp-1gb-overlay.dtbo-base := bengal-1gb.dtb
bengal-idp-2gb-overlay.dtbo-base := bengal-2gb.dtb
bengal-idp-usbc-1gb-overlay.dtbo-base := bengal-1gb.dtb
bengal-idp-usbc-2gb-overlay.dtbo-base := bengal-2gb.dtb
qcm4290-iot-idp-overlay.dtbo-base := qcm4290.dtb
qcs4290-iot-idp-overlay.dtbo-base := qcs4290.dtb
qcm4290-iot-idp-1gb-overlay.dtbo-base := qcm4290-iot-1gb.dtb
qcm4290-iot-idp-2gb-overlay.dtbo-base := qcm4290-iot-2gb.dtb
qcm4290-iot-idp-usbc-1gb-overlay.dtbo-base := qcm4290-iot-1gb.dtb
qcm4290-iot-idp-usbc-2gb-overlay.dtbo-base := qcm4290-iot-2gb.dtb
qcm4290-iot-idp-usbc-overlay.dtbo-base := qcm4290.dtb
else
dtb-$(CONFIG_ARCH_BENGAL) += bengal-rumi.dtb \
bengal-qrd.dtb \
bengal-idp.dtb \
bengal-idp-usbc.dtb \
bengalp-idp.dtb \
bengal-idp-1gb.dtb \
bengal-idp-2gb.dtb \
bengal-idp-usbc-1gb.dtb \
bengal-idp-usbc-2gb.dtb \
qcm4290-iot-idp.dtb \
qcs4290-iot-idp.dtb \
qcm4290-iot-idp-1gb.dtb \
qcm4290-iot-idp-2gb.dtb \
qcm4290-iot-idp-usbc-1gb.dtb \
qcm4290-iot-idp-usbc-2gb.dtb \
qcm4290-iot-idp-usbc.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
dtbo-$(CONFIG_ARCH_SCUBA) += \
scuba-rumi-overlay.dtbo \
scuba-idp-overlay.dtbo \
scuba-idp-usbc-overlay.dtbo \
scuba-qrd-eldo-overlay.dtbo \
scuba-qrd-non-eldo-overlay.dtbo
scuba-rumi-overlay.dtbo-base := scuba.dtb scubap.dtb scuba-2gb.dtb
scuba-idp-overlay.dtbo-base := scuba.dtb scubap.dtb scuba-2gb.dtb
scuba-qrd-eldo-overlay.dtbo-base := scuba.dtb scubap.dtb scuba-2gb.dtb
scuba-qrd-non-eldo-overlay.dtbo-base := scuba.dtb scubap.dtb scuba-2gb.dtb
scuba-idp-usbc-overlay.dtbo-base := scuba.dtb scubap.dtb scuba-2gb.dtb
else
dtb-$(CONFIG_ARCH_SCUBA) += scuba-rumi.dtb \
scuba-idp.dtb \
scuba-idp-usbc.dtb \
scuba-qrd-eldo.dtb \
scuba-qrd-non-eldo.dtb \
scubap-idp.dtb \
scubap-idp-2gb.dtb \
scuba-idp-2gb.dtb \
scuba-idp-usbc-2gb.dtb
endif
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

145
arch/arm64/boot/dts/vendor/qcom/OP-fg-batterydata-4300mah.dtsi vendored Normal file
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@ -0,0 +1,145 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
qcom,OP_4300mAh {
qcom,max-voltage-uv = <4420000>;
qcom,fastchg-current-ma = <3000>;
qcom,jeita-fcc-ranges = <0 100 2500000
110 400 5400000
410 450 2500000>;
qcom,jeita-fv-ranges = <0 100 4250000
110 400 4420000
410 450 4250000>;
qcom,step-chg-ranges = <3600000 3800000 5400000
3801000 4300000 3600000
4301000 4350000 2500000>;
qcom,ocv-based-step-chg;
qcom,batt-id-kohm = <200>;
qcom,battery-beta = <4250>;
qcom,therm-room-temp = <100000>;
qcom,fg-cc-cv-threshold-mv = <4380>;
qcom,battery-type = "OP_4300mAh";
qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
qcom,therm-center-offset = <0x70>;
qcom,therm-pull-up = <100>;
qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>;
qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>;
qcom,checksum = <0x1538>;
qcom,gui-version = "PM855GUI - 1.0.0.10";
qcom,fg-profile-data = [
09 00 C7 EA
C4 DC 8E E2
3A DD 00 00
15 BC A5 8A
02 80 D1 92
AB 9D 47 80
10 00 DF 02
77 1A 85 EC
E1 FD CE 07
32 00 75 EB
AA ED F3 CD
0C 0A 7A E4
ED C5 40 1B
D0 02 1F CA
FF 00 52 00
4D 00 4A 00
3C 00 35 00
38 00 39 00
48 00 43 00
3F 00 FF 00
38 00 40 00
46 00 50 00
45 00 5C 00
7E 64 60 00
50 08 50 10
FF 00 6A 00
5F 00 63 00
6E 00 60 00
7D 20 96 40
75 50 6B 13
63 00 D8 00
14 22 7E 0D
21 02 AA 04
ED 1C D4 09
64 0C D3 23
A4 18 D3 42
B5 55 91 02
90 12 2A 1F
02 06 1F 0A
A3 06 AE 1C
8D 02 96 04
D2 03 D1 17
51 23 3F 45
28 53 69 14
93 20 8E EC
18 CB C8 C5
DB 1C 7B C9
7C 05 E6 C2
B9 17 2C 93
87 85 A2 92
91 A8 09 80
92 F2 1A 0D
F4 FC 5E EB
00 F8 FB ED
15 E2 F6 0F
75 02 72 05
49 01 10 00
FA E5 E2 03
8D 05 85 02
CE 07 32 00
23 03 46 02
9C 04 03 02
48 07 0A 00
BA 03 97 02
65 05 50 00
3A 00 41 00
43 64 45 00
45 10 45 18
46 08 44 00
47 00 3A 08
4B 08 37 00
47 20 4E 40
54 58 60 10
57 00 5F 00
57 08 55 00
4B 00 50 00
3E 08 52 08
52 00 5C 20
6F 40 7D 58
67 10 63 00
69 08 4F 10
D8 00 8C 2A
DB 04 28 02
AD 04 0B 1D
50 22 A7 45
0D 52 A2 18
74 03 AD 04
35 02 AE 13
3F 0A 5A 20
DD 04 F1 02
D8 05 C7 1C
DD 02 3D 04
EB 03 97 18
52 03 D5 04
19 02 72 00
14 22 7E 05
21 02 AA 04
ED 1C D4 01
64 04 D3 03
A4 18 D3 02
B5 05 91 02
90 00 7C 01
C0 00 FA 00
04 0E 00 00
];
};

145
arch/arm64/boot/dts/vendor/qcom/OP-fg-batterydata-4320mah.dtsi vendored Normal file
View File

@ -0,0 +1,145 @@
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
qcom,OP_4320mAh {
qcom,max-voltage-uv = <4420000>;
qcom,fastchg-current-ma = <3000>;
qcom,jeita-fcc-ranges = <0 100 2500000
110 400 5400000
410 450 2500000>;
qcom,jeita-fv-ranges = <0 100 4250000
110 400 4420000
410 450 4250000>;
qcom,step-chg-ranges = <3600000 3800000 5400000
3801000 4300000 3600000
4301000 4350000 2500000>;
qcom,ocv-based-step-chg;
qcom,batt-id-kohm = <200>;
qcom,battery-beta = <4250>;
qcom,therm-room-temp = <100000>;
qcom,fg-cc-cv-threshold-mv = <4380>;
qcom,battery-type = "OP_4320mAh";
qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
qcom,therm-center-offset = <0x70>;
qcom,therm-pull-up = <100>;
qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>;
qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>;
qcom,checksum = <0x1538>;
qcom,gui-version = "PM855GUI - 1.0.0.10";
qcom,fg-profile-data = [
09 00 C7 EA
C4 DC 8E E2
3A DD 00 00
15 BC A5 8A
02 80 D1 92
AB 9D 47 80
10 00 DF 02
77 1A 85 EC
E1 FD CE 07
32 00 75 EB
AA ED F3 CD
0C 0A 7A E4
ED C5 40 1B
D0 02 1F CA
FF 00 52 00
4D 00 4A 00
3C 00 35 00
38 00 39 00
48 00 43 00
3F 00 FF 00
38 00 40 00
46 00 50 00
45 00 5C 00
7E 64 60 00
50 08 50 10
FF 00 6A 00
5F 00 63 00
6E 00 60 00
7D 20 96 40
75 50 6B 13
63 00 D8 00
14 22 7E 0D
21 02 AA 04
ED 1C D4 09
64 0C D3 23
A4 18 D3 42
B5 55 91 02
90 12 2A 1F
02 06 1F 0A
A3 06 AE 1C
8D 02 96 04
D2 03 D1 17
51 23 3F 45
28 53 69 14
93 20 8E EC
18 CB C8 C5
DB 1C 7B C9
7C 05 E6 C2
B9 17 2C 93
87 85 A2 92
91 A8 09 80
92 F2 1A 0D
F4 FC 5E EB
00 F8 FB ED
15 E2 F6 0F
75 02 72 05
49 01 10 00
FA E5 E2 03
8D 05 85 02
CE 07 32 00
23 03 46 02
9C 04 03 02
48 07 0A 00
BA 03 97 02
65 05 50 00
3A 00 41 00
43 64 45 00
45 10 45 18
46 08 44 00
47 00 3A 08
4B 08 37 00
47 20 4E 40
54 58 60 10
57 00 5F 00
57 08 55 00
4B 00 50 00
3E 08 52 08
52 00 5C 20
6F 40 7D 58
67 10 63 00
69 08 4F 10
D8 00 8C 2A
DB 04 28 02
AD 04 0B 1D
50 22 A7 45
0D 52 A2 18
74 03 AD 04
35 02 AE 13
3F 0A 5A 20
DD 04 F1 02
D8 05 C7 1C
DD 02 3D 04
EB 03 97 18
52 03 D5 04
19 02 72 00
14 22 7E 05
21 02 AA 04
ED 1C D4 01
64 04 D3 03
A4 18 D3 02
B5 05 91 02
90 00 7C 01
C0 00 FA 00
04 0E 00 00
];
};

145
arch/arm64/boot/dts/vendor/qcom/OP-fg-batterydata-4500mah.dtsi vendored Normal file
View File

@ -0,0 +1,145 @@
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
qcom,OP_4500mAh {
qcom,max-voltage-uv = <4420000>;
qcom,fastchg-current-ma = <3000>;
qcom,jeita-fcc-ranges = <0 100 2500000
110 400 5400000
410 450 2500000>;
qcom,jeita-fv-ranges = <0 100 4250000
110 400 4420000
410 450 4250000>;
qcom,step-chg-ranges = <3600000 3800000 5400000
3801000 4300000 3600000
4301000 4350000 2500000>;
qcom,ocv-based-step-chg;
qcom,batt-id-kohm = <200>;
qcom,battery-beta = <4250>;
qcom,therm-room-temp = <100000>;
qcom,fg-cc-cv-threshold-mv = <4380>;
qcom,battery-type = "OP_4500mAh";
qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
qcom,therm-center-offset = <0x70>;
qcom,therm-pull-up = <100>;
qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>;
qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>;
qcom,checksum = <0x1538>;
qcom,gui-version = "PM855GUI - 1.0.0.10";
qcom,fg-profile-data = [
09 00 C7 EA
C4 DC 8E E2
3A DD 00 00
15 BC A5 8A
02 80 D1 92
AB 9D 47 80
10 00 DF 02
77 1A 85 EC
E1 FD CE 07
32 00 75 EB
AA ED F3 CD
0C 0A 7A E4
ED C5 40 1B
D0 02 1F CA
FF 00 52 00
4D 00 4A 00
3C 00 35 00
38 00 39 00
48 00 43 00
3F 00 FF 00
38 00 40 00
46 00 50 00
45 00 5C 00
7E 64 60 00
50 08 50 10
FF 00 6A 00
5F 00 63 00
6E 00 60 00
7D 20 96 40
75 50 6B 13
63 00 D8 00
14 22 7E 0D
21 02 AA 04
ED 1C D4 09
64 0C D3 23
A4 18 D3 42
B5 55 91 02
90 12 2A 1F
02 06 1F 0A
A3 06 AE 1C
8D 02 96 04
D2 03 D1 17
51 23 3F 45
28 53 69 14
93 20 8E EC
18 CB C8 C5
DB 1C 7B C9
7C 05 E6 C2
B9 17 2C 93
87 85 A2 92
91 A8 09 80
92 F2 1A 0D
F4 FC 5E EB
00 F8 FB ED
15 E2 F6 0F
75 02 72 05
49 01 10 00
FA E5 E2 03
8D 05 85 02
CE 07 32 00
23 03 46 02
9C 04 03 02
48 07 0A 00
BA 03 97 02
65 05 50 00
3A 00 41 00
43 64 45 00
45 10 45 18
46 08 44 00
47 00 3A 08
4B 08 37 00
47 20 4E 40
54 58 60 10
57 00 5F 00
57 08 55 00
4B 00 50 00
3E 08 52 08
52 00 5C 20
6F 40 7D 58
67 10 63 00
69 08 4F 10
D8 00 8C 2A
DB 04 28 02
AD 04 0B 1D
50 22 A7 45
0D 52 A2 18
74 03 AD 04
35 02 AE 13
3F 0A 5A 20
DD 04 F1 02
D8 05 C7 1C
DD 02 3D 04
EB 03 97 18
52 03 D5 04
19 02 72 00
14 22 7E 05
21 02 AA 04
ED 1C D4 01
64 04 D3 03
A4 18 D3 02
B5 05 91 02
90 00 7C 01
C0 00 FA 00
04 0E 00 00
];
};

145
arch/arm64/boot/dts/vendor/qcom/OP-fg-batterydata-4510mah.dtsi vendored Normal file
View File

@ -0,0 +1,145 @@
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
qcom,OP_4510mAh {
qcom,max-voltage-uv = <4420000>;
qcom,fastchg-current-ma = <3000>;
qcom,jeita-fcc-ranges = <0 100 2500000
110 400 5400000
410 450 2500000>;
qcom,jeita-fv-ranges = <0 100 4250000
110 400 4420000
410 450 4250000>;
qcom,step-chg-ranges = <3600000 3800000 5400000
3801000 4300000 3600000
4301000 4350000 2500000>;
qcom,ocv-based-step-chg;
qcom,batt-id-kohm = <200>;
qcom,battery-beta = <4250>;
qcom,therm-room-temp = <100000>;
qcom,fg-cc-cv-threshold-mv = <4380>;
qcom,battery-type = "OP_4510mAh";
qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
qcom,therm-center-offset = <0x70>;
qcom,therm-pull-up = <100>;
qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>;
qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>;
qcom,checksum = <0x1538>;
qcom,gui-version = "PM855GUI - 1.0.0.10";
qcom,fg-profile-data = [
09 00 C7 EA
C4 DC 8E E2
3A DD 00 00
15 BC A5 8A
02 80 D1 92
AB 9D 47 80
10 00 DF 02
77 1A 85 EC
E1 FD CE 07
32 00 75 EB
AA ED F3 CD
0C 0A 7A E4
ED C5 40 1B
D0 02 1F CA
FF 00 52 00
4D 00 4A 00
3C 00 35 00
38 00 39 00
48 00 43 00
3F 00 FF 00
38 00 40 00
46 00 50 00
45 00 5C 00
7E 64 60 00
50 08 50 10
FF 00 6A 00
5F 00 63 00
6E 00 60 00
7D 20 96 40
75 50 6B 13
63 00 D8 00
14 22 7E 0D
21 02 AA 04
ED 1C D4 09
64 0C D3 23
A4 18 D3 42
B5 55 91 02
90 12 2A 1F
02 06 1F 0A
A3 06 AE 1C
8D 02 96 04
D2 03 D1 17
51 23 3F 45
28 53 69 14
93 20 8E EC
18 CB C8 C5
DB 1C 7B C9
7C 05 E6 C2
B9 17 2C 93
87 85 A2 92
91 A8 09 80
92 F2 1A 0D
F4 FC 5E EB
00 F8 FB ED
15 E2 F6 0F
75 02 72 05
49 01 10 00
FA E5 E2 03
8D 05 85 02
CE 07 32 00
23 03 46 02
9C 04 03 02
48 07 0A 00
BA 03 97 02
65 05 50 00
3A 00 41 00
43 64 45 00
45 10 45 18
46 08 44 00
47 00 3A 08
4B 08 37 00
47 20 4E 40
54 58 60 10
57 00 5F 00
57 08 55 00
4B 00 50 00
3E 08 52 08
52 00 5C 20
6F 40 7D 58
67 10 63 00
69 08 4F 10
D8 00 8C 2A
DB 04 28 02
AD 04 0B 1D
50 22 A7 45
0D 52 A2 18
74 03 AD 04
35 02 AE 13
3F 0A 5A 20
DD 04 F1 02
D8 05 C7 1C
DD 02 3D 04
EB 03 97 18
52 03 D5 04
19 02 72 00
14 22 7E 05
21 02 AA 04
ED 1C D4 01
64 04 D3 03
A4 18 D3 02
B5 05 91 02
90 00 7C 01
C0 00 FA 00
04 0E 00 00
];
};

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arch/arm64/boot/dts/vendor/qcom/bengal-1gb.dts vendored Normal file
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/dts-v1/;
#include "bengal-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal 1Gb DDR HD+ SoC";
compatible = "qcom,bengal";
qcom,board-id = <0 0x303>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal-2gb.dts vendored Normal file
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/dts-v1/;
#include "bengal-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal 2Gb DDR HD+ SoC";
compatible = "qcom,bengal";
qcom,board-id = <0 0x403>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal-audio-overlay.dtsi vendored Normal file
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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
#include <dt-bindings/sound/qcom,bolero-clk-rsc.h>
#include <dt-bindings/sound/audio-codec-port-types.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&bolero {
qcom,num-macros = <3>;
qcom,bolero-version = <5>;
bolero-clk-rsc-mngr {
compatible = "qcom,bolero-clk-rsc-mngr";
qcom,fs-gen-sequence = <0x3000 0x1>,
<0x3004 0x1>, <0x3080 0x2>;
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
qcom,va_mclk_mode_muxsel = <0x0a7a0000>;
clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
"va_core_clk", "va_npl_clk";
clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
};
tx_macro: tx-macro@a620000 {
compatible = "qcom,tx-macro";
reg = <0xa620000 0x0>;
clock-names = "tx_core_clk", "tx_npl_clk";
clocks = <&clock_audio_tx_1 0>,
<&clock_audio_tx_2 0>;
qcom,tx-dmic-sample-rate = <2400000>;
qcom,is-used-swr-gpio = <0>;
};
rx_macro: rx-macro@a600000 {
compatible = "qcom,rx-macro";
reg = <0xa600000 0x0>;
clock-names = "rx_core_clk", "rx_npl_clk";
clocks = <&clock_audio_rx_1 0>,
<&clock_audio_rx_2 0>;
qcom,rx-swr-gpios = <&rx_swr_gpios>;
qcom,rx_mclk_mode_muxsel = <0x0a5640d8>;
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
qcom,default-clk-id = <TX_CORE_CLK>;
swr1: rx_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <2>;
qcom,swrm-hctl-reg = <0x0a6a9098>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0xa610000 0x0>;
interrupts = <0 297 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <5>;
qcom,swr-port-mapping = <1 HPH_L 0x1>,
<1 HPH_R 0x2>, <2 CLSH 0x1>,
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
<4 LO 0x1>, <5 DSD_L 0x1>,
<5 DSD_R 0x2>;
qcom,swr-num-dev = <1>;
qcom,disable-div2-clk-switch = <1>;
qcom,swr-clock-stop-mode0 = <1>;
wcd937x_rx_slave: wcd937x-rx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170224>;
};
};
};
va_macro: va-macro@a730000 {
compatible = "qcom,va-macro";
reg = <0xa730000 0x0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,va-dmic-sample-rate = <600000>;
qcom,va-clk-mux-select = <1>;
qcom,va-island-mode-muxsel = <0x0a7a0000>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,is-used-swr-gpio = <1>;
qcom,va-swr-gpios = <&va_swr_gpios>;
swr0: va_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <3>;
qcom,swrm-hctl-reg = <0x0a7ec100>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0xa740000 0x0>;
interrupts =
<0 296 IRQ_TYPE_LEVEL_HIGH>,
<0 79 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq", "swr_wake_irq";
qcom,swr-wakeup-required = <1>;
qcom,swr-num-ports = <3>;
qcom,swr-port-mapping = <1 ADC1 0x1>, <1 ADC2 0x2>,
<1 ADC3 0x4>, <1 ADC4 0x8>,
<2 DMIC0 0x1>, <2 DMIC1 0x2>,
<2 DMIC2 0x4>, <2 DMIC3 0x8>,
<3 DMIC4 0x1>, <3 DMIC5 0x2>,
<3 DMIC6 0x4>, <3 DMIC7 0x8>;
qcom,swr-num-dev = <1>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-mstr-irq-wakeup-capable = <1>;
wcd937x_tx_slave: wcd937x-tx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170223>;
};
};
};
wcd937x_codec: wcd937x-codec {
compatible = "qcom,wcd937x-codec";
qcom,split-codec = <1>;
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
<4 DSD_R 0x2 0 DSD_R>;
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
<1 ADC2 0x1 0 DMIC0>, <1 ADC3 0x2 0 DMIC1>,
<2 DMIC0 0x1 0 DMIC4>, <2 DMIC1 0x2 0 DMIC5>,
<2 MBHC 0x4 0 DMIC6>, <3 DMIC2 0x1 0 DMIC4>,
<3 DMIC3 0x2 0 DMIC5>, <3 DMIC4 0x4 0 DMIC6>,
<3 DMIC5 0x8 0 DMIC7>;
qcom,wcd-rst-gpio-node = <&wcd937x_rst_gpio>;
qcom,rx-slave = <&wcd937x_rx_slave>;
qcom,tx-slave = <&wcd937x_tx_slave>;
cdc-vdd-rxtx-supply = <&L9A>;
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
qcom,cdc-vdd-rxtx-current = <10000>;
cdc-vddpx-supply = <&L9A>;
qcom,cdc-vddpx-voltage = <1800000 1800000>;
qcom,cdc-vddpx-current = <20000>;
cdc-vdd-buck-supply = <&L14A>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
qcom,cdc-vdd-buck-current = <650000>;
qcom,cdc-micbias1-mv = <1800>;
qcom,cdc-micbias2-mv = <1800>;
qcom,cdc-micbias3-mv = <1800>;
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
"cdc-vddpx";
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
};
};
&bengal_snd {
qcom,model = "bengal-idp-snd-card";
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
qcom,wcn-btfm = <1>;
qcom,va-bolero-codec = <1>;
qcom,rxtx-bolero-codec = <1>;
qcom,audio-routing =
"AMIC1", "MIC BIAS1",
"MIC BIAS1", "Analog Mic1",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Analog Mic2",
"AMIC3", "MIC BIAS3",
"MIC BIAS3", "Analog Mic3",
"AMIC4", "MIC BIAS3",
"MIC BIAS3", "Analog Mic4",
"TX DMIC0", "MIC BIAS1",
"MIC BIAS1", "Digital Mic0",
"TX DMIC1", "MIC BIAS1",
"MIC BIAS1", "Digital Mic1",
"TX DMIC2", "MIC BIAS3",
"MIC BIAS3", "Digital Mic2",
"TX DMIC3", "MIC BIAS3",
"MIC BIAS3", "Digital Mic3",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"SpkrMono WSA_IN", "AUX",
"TX SWR_MIC0", "ADC1_OUTPUT",
"TX SWR_MIC4", "ADC2_OUTPUT",
"TX SWR_MIC5", "ADC3_OUTPUT",
"TX SWR_MIC8", "DMIC1_OUTPUT",
"TX SWR_MIC9", "DMIC2_OUTPUT",
"TX SWR_MIC8", "DMIC3_OUTPUT",
"TX SWR_MIC9", "DMIC4_OUTPUT",
"TX SWR_MIC10", "DMIC5_OUTPUT",
"TX SWR_MIC11", "DMIC6_OUTPUT",
"TX SWR_MIC0", "VA_TX_SWR_CLK",
"TX SWR_MIC1", "VA_TX_SWR_CLK",
"TX SWR_MIC2", "VA_TX_SWR_CLK",
"TX SWR_MIC3", "VA_TX_SWR_CLK",
"TX SWR_MIC4", "VA_TX_SWR_CLK",
"TX SWR_MIC5", "VA_TX_SWR_CLK",
"TX SWR_MIC6", "VA_TX_SWR_CLK",
"TX SWR_MIC7", "VA_TX_SWR_CLK",
"TX SWR_MIC8", "VA_TX_SWR_CLK",
"TX SWR_MIC9", "VA_TX_SWR_CLK",
"TX SWR_MIC10", "VA_TX_SWR_CLK",
"TX SWR_MIC11", "VA_TX_SWR_CLK",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"TX_AIF1 CAP", "VA_TX_SWR_CLK",
"TX_AIF2 CAP", "VA_TX_SWR_CLK",
"TX_AIF3 CAP", "VA_TX_SWR_CLK",
"VA DMIC0", "VA MIC BIAS1",
"VA DMIC1", "VA MIC BIAS1",
"VA DMIC2", "VA MIC BIAS3",
"VA DMIC3", "VA MIC BIAS3",
"VA MIC BIAS1", "Digital Mic0",
"VA MIC BIAS1", "Digital Mic1",
"VA MIC BIAS3", "Digital Mic2",
"VA MIC BIAS3", "Digital Mic3",
"VA SWR_MIC0", "ADC1_OUTPUT",
"VA SWR_MIC4", "ADC2_OUTPUT",
"VA SWR_MIC5", "ADC3_OUTPUT",
"VA SWR_MIC8", "DMIC1_OUTPUT",
"VA SWR_MIC9", "DMIC2_OUTPUT",
"VA SWR_MIC8", "DMIC3_OUTPUT",
"VA SWR_MIC9", "DMIC4_OUTPUT",
"VA SWR_MIC10", "DMIC5_OUTPUT",
"VA SWR_MIC11", "DMIC6_OUTPUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
asoc-codec = <&stub_codec>, <&bolero>;
asoc-codec-names = "msm-stub-codec.1", "bolero_codec";
qcom,wsa-max-devs = <1>;
qcom,wsa-devs = <&wsa881x_i2c_e>;
qcom,wsa-aux-dev-prefix = "SpkrMono";
qcom,codec-max-aux-devs = <1>;
qcom,codec-aux-devs = <&wcd937x_codec>;
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&bolero>,
<&lpi_tlmm>;
};
&qupv3_se1_i2c {
wsa881x_i2c_e: wsa881x-i2c-codec@e {
compatible = "qcom,wsa881x-i2c-codec";
reg = <0x0e>;
clock-names = "wsa_mclk";
clocks = <&wsa881x_analog_clk 0>;
qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>;
qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>;
};
wsa881x_i2c_44: wsa881x-i2c-codec@44 {
compatible = "qcom,wsa881x-i2c-codec";
reg = <0x044>;
};
};
&soc {
wcd937x_rst_gpio: msm_cdc_pinctrl@92 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wcd937x_reset_active>;
pinctrl-1 = <&wcd937x_reset_sleep>;
};
wsa881x_analog_reset_gpio: msm_cdc_pinctrl@106 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_1_sd_n_active>;
pinctrl-1 = <&spkr_1_sd_n_sleep>;
};
wsa881x_analog_clk: wsa_ana_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
qcom,codec-lpass-ext-clk-freq = <9600000>;
qcom,codec-lpass-clk-id = <0x301>;
#clock-cells = <1>;
};
clock_audio_rx_1: rx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30E>;
#clock-cells = <1>;
};
clock_audio_rx_2: rx_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_5>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30F>;
#clock-cells = <1>;
};
clock_audio_tx_1: tx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30C>;
#clock-cells = <1>;
};
clock_audio_tx_2: tx_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_7>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30D>;
#clock-cells = <1>;
};
clock_audio_va_1: va_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30B>;
#clock-cells = <1>;
};
clock_audio_va_2: va_npl_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x310>;
#clock-cells = <1>;
};
};
&va_cdc_dma_0_tx {
qcom,msm-dai-is-island-supported = <1>;
};
&adsp_loader {
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
adsp-fw-names = "adsp2";
adsp-fw-bit-values = <0x1>;
};

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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
#include "msm-audio-lpass.dtsi"
&msm_audio_ion {
iommus = <&apps_smmu 0x01c1 0x0>;
qcom,smmu-sid-mask = /bits/ 64 <0xf>;
};
&audio_apr {
q6core: qcom,q6core-audio {
compatible = "qcom,q6core-audio";
lpass_audio_hw_vote: vote_lpass_audio_hw {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
#clock-cells = <1>;
};
};
};
#include "bengal-lpi.dtsi"
&q6core {
cdc_dmic01_gpios: cdc_dmic01_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
qcom,lpi-gpios;
};
cdc_dmic23_gpios: cdc_dmic23_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
qcom,lpi-gpios;
};
rx_swr_gpios: rx_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active
&rx_swr_data1_active>;
pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep
&rx_swr_data1_sleep>;
qcom,lpi-gpios;
};
va_swr_gpios: va_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&tx_swr_clk_active &tx_swr_data1_active
&tx_swr_data2_active>;
pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data1_sleep
&tx_swr_data2_sleep>;
qcom,lpi-gpios;
qcom,chip-wakeup-reg = <0x003ca04c>;
qcom,chip-wakeup-maskbit = <0>;
qcom,chip-wakeup-default-val = <0x1>;
};
wsa881x_analog_clk_gpio: msm_cdc_pinctrl@18 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wsa_mclk_active>;
pinctrl-1 = <&wsa_mclk_sleep>;
qcom,lpi-gpios;
};
};
&q6core {
bolero: bolero-cdc {
compatible = "qcom,bolero-codec";
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
bolero-clk-rsc-mngr {
compatible = "qcom,bolero-clk-rsc-mngr";
};
va_macro: va-macro@a730000 {
swr0: va_swr_master {
};
};
rx_macro: rx-macro@a600000 {
swr1: rx_swr_master {
};
};
};
};
&q6core {
bengal_snd: sound {
compatible = "qcom,bengal-asoc-snd";
qcom,mi2s-audio-intf = <0>;
qcom,auxpcm-audio-intf = <0>;
qcom,tdm-audio-intf = <0>;
qcom,wcn-btfm = <1>;
qcom,afe-rxtx-lb = <0>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&compr>,
<&pcm_noirq>;
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
"msm-pcm-dsp.2", "msm-voip-dsp",
"msm-pcm-voice", "msm-pcm-loopback",
"msm-compress-dsp", "msm-pcm-hostless",
"msm-pcm-afe", "msm-lsm-client",
"msm-pcm-routing", "msm-compr-dsp",
"msm-pcm-dsp-noirq";
asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
<&dai_mi2s2>, <&dai_mi2s3>,
<&dai_pri_auxpcm>,
<&dai_sec_auxpcm>, <&dai_tert_auxpcm>,
<&dai_quat_auxpcm>,
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
<&afe_proxy_tx>, <&incall_record_rx>,
<&incall_record_tx>, <&incall_music_rx>,
<&incall_music_2_rx>,
<&proxy_rx>, <&proxy_tx>,
<&usb_audio_rx>, <&usb_audio_tx>,
<&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>,
<&va_cdc_dma_0_tx>, <&va_cdc_dma_1_tx>,
<&va_cdc_dma_2_tx>,
<&rx_cdc_dma_0_rx>, <&tx_cdc_dma_0_tx>,
<&rx_cdc_dma_1_rx>, <&tx_cdc_dma_1_tx>,
<&rx_cdc_dma_2_rx>, <&tx_cdc_dma_2_tx>,
<&rx_cdc_dma_3_rx>, <&tx_cdc_dma_3_tx>,
<&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>,
<&rx_cdc_dma_5_rx>, <&tx_cdc_dma_5_tx>,
<&rx_cdc_dma_6_rx>, <&rx_cdc_dma_7_rx>,
<&afe_loopback_tx>;
asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
"msm-dai-q6-auxpcm.1",
"msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3",
"msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.224",
"msm-dai-q6-dev.225", "msm-dai-q6-dev.241",
"msm-dai-q6-dev.240", "msm-dai-q6-dev.32771",
"msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773",
"msm-dai-q6-dev.32770",
"msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195",
"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
"msm-dai-q6-dev.16401",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913",
"msm-dai-cdc-dma-dev.45089",
"msm-dai-cdc-dma-dev.45091",
"msm-dai-cdc-dma-dev.45093",
"msm-dai-cdc-dma-dev.45104",
"msm-dai-cdc-dma-dev.45105",
"msm-dai-cdc-dma-dev.45106",
"msm-dai-cdc-dma-dev.45107",
"msm-dai-cdc-dma-dev.45108",
"msm-dai-cdc-dma-dev.45109",
"msm-dai-cdc-dma-dev.45110",
"msm-dai-cdc-dma-dev.45111",
"msm-dai-cdc-dma-dev.45112",
"msm-dai-cdc-dma-dev.45113",
"msm-dai-cdc-dma-dev.45114",
"msm-dai-cdc-dma-dev.45115",
"msm-dai-cdc-dma-dev.45116",
"msm-dai-cdc-dma-dev.45118",
"msm-dai-q6-dev.24577";
fsa4480-i2c-handle = <&fsa4480>;
};
};
&qupv3_se1_i2c {
status = "ok";
fsa4480: fsa4480@42 {
compatible = "qcom,fsa4480-i2c";
reg = <0x42>;
};
};

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&soc {
/* GDSCs in GCC */
gcc_camss_top_gdsc: qcom,gdsc@1458004 {
compatible = "qcom,gdsc";
reg = <0x1458004 0x4>;
regulator-name = "gcc_camss_top_gdsc";
status = "disabled";
};
gcc_ufs_phy_gdsc: qcom,gdsc@1445004 {
compatible = "qcom,gdsc";
reg = <0x1445004 0x4>;
regulator-name = "gcc_ufs_phy_gdsc";
status = "disabled";
};
gcc_usb30_prim_gdsc: qcom,gdsc@141a004 {
compatible = "qcom,gdsc";
reg = <0x141a004 0x4>;
regulator-name = "gcc_usb30_prim_gdsc";
status = "disabled";
};
gcc_vcodec0_gdsc: qcom,gdsc@1458098 {
compatible = "qcom,gdsc";
reg = <0x1458098 0x4>;
regulator-name = "gcc_vcodec0_gdsc";
status = "disabled";
};
gcc_venus_gdsc: qcom,gdsc@145807c {
compatible = "qcom,gdsc";
reg = <0x145807c 0x4>;
regulator-name = "gcc_venus_gdsc";
status = "disabled";
};
hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@147d060 {
compatible = "qcom,gdsc";
reg = <0x147d060 0x4>;
regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@147d07c {
compatible = "qcom,gdsc";
reg = <0x147d07c 0x4>;
regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc: qcom,gdsc@147d074 {
compatible = "qcom,gdsc";
reg = <0x147d074 0x4>;
regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc: qcom,gdsc@147d078 {
compatible = "qcom,gdsc";
reg = <0x147d078 0x4>;
regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
/* GDSCs in DISPCC */
mdss_core_gdsc: qcom,gdsc@5f03000 {
compatible = "qcom,gdsc";
reg = <0x5f03000 0x4>;
regulator-name = "mdss_core_gdsc";
proxy-supply = <&mdss_core_gdsc>;
qcom,proxy-consumer-enable;
status = "disabled";
};
/* GDSCs in GPUCC */
gpu_gx_domain_addr: syscon@5991508 {
compatible = "syscon";
reg = <0x5991508 0x4>;
};
gpu_cx_hw_ctrl: syscon@5991540 {
compatible = "syscon";
reg = <0x5991540 0x4>;
};
gpu_gx_sw_reset: syscon@5991008 {
compatible = "syscon";
reg = <0x5991008 0x4>;
};
gpu_cx_gdsc: qcom,gdsc@599106c {
compatible = "qcom,gdsc";
reg = <0x599106c 0x4>;
regulator-name = "gpu_cx_gdsc";
hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <500>;
qcom,clk-dis-wait-val = <8>;
status = "disabled";
};
gpu_gx_gdsc: qcom,gdsc@599100c {
compatible = "qcom,gdsc";
reg = <0x599100c 0x4>;
regulator-name = "gpu_gx_gdsc";
sw-reset = <&gpu_gx_sw_reset>;
domain-addr = <&gpu_gx_domain_addr>;
status = "disabled";
};
};

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&soc {
pil_gpu: qcom,kgsl-hyp {
compatible = "qcom,pil-tz-generic";
qcom,pas-id = <13>;
qcom,firmware-name = "a610_zap";
qcom,mas-crypto = <&mas_crypto_c0>;
};
gpu_opp_table: gpu-opp-table {
compatible = "operating-points-v2";
opp-980000000 {
opp-hz = /bits/ 64 <980000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
};
opp-950000000 {
opp-hz = /bits/ 64 <950000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
};
opp-900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>;
};
opp-820000000 {
opp-hz = /bits/ 64 <820000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;
};
opp-745000000 {
opp-hz = /bits/ 64 <745000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;
};
opp-465000000 {
opp-hz = /bits/ 64 <465000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;
};
opp-320000000 {
opp-hz = /bits/ 64 <320000000>;
opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
};
};
msm_bus: qcom,kgsl-busmon {
label = "kgsl-busmon";
compatible = "qcom,kgsl-busmon";
operating-points-v2 = <&gpu_opp_table>;
};
gpu_bw_tbl: gpu-bw-tbl {
compatible = "operating-points-v2";
opp-0 { opp-hz = /bits/ 64 < 0 >; }; /* OFF */
opp-100 { opp-hz = /bits/ 64 < 762 >; }; /* 1.100 MHz */
opp-200 { opp-hz = /bits/ 64 < 1525 >; }; /* 2.200 MHz */
opp-300 { opp-hz = /bits/ 64 < 2288 >; }; /* 3.300 MHz */
opp-451 { opp-hz = /bits/ 64 < 3440 >; }; /* 4.451 MHz */
opp-547 { opp-hz = /bits/ 64 < 4173 >; }; /* 5.547 MHz */
opp-681 { opp-hz = /bits/ 64 < 5195 >; }; /* 6.681 MHz */
opp-768 { opp-hz = /bits/ 64 < 5859 >; }; /* 7.768 MHz */
opp-1017 { opp-hz = /bits/ 64 < 7759 >; }; /* 8.1017 MHz */
opp-1353 { opp-hz = /bits/ 64 < 10322 >; }; /* 9.1353 MHz */
opp-1555 { opp-hz = /bits/ 64 < 11863 >; }; /* 10.1555 MHz */
opp-1804 { opp-hz = /bits/ 64 < 13763 >; }; /* 11.1804 MHz */
};
gpubw: qcom,gpubw {
compatible = "qcom,devbw";
governor = "bw_vbif";
qcom,src-dst-ports = <26 512>;
operating-points-v2 = <&gpu_bw_tbl>;
};
msm_gpu: qcom,kgsl-3d0@5900000 {
label = "kgsl-3d0";
compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
status = "ok";
reg = <0x5900000 0x90000>,
<0x5961000 0x800>;
reg-names = "kgsl_3d0_reg_memory", "cx_dbgc";
interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "kgsl_3d0_irq";
qcom,id = <0>;
qcom,chipid = <0x06010000>;
qcom,initial-pwrlevel = <6>;
qcom,idle-timeout = <80>;
qcom,ubwc-mode = <1>;
qcom,min-access-length = <64>;
qcom,highest-bank-bit = <14>;
/* size in bytes */
qcom,snapshot-size = <1048576>;
/* base addr, size */
qcom,gpu-qdss-stm = <0xe1c0000 0x40000>;
#cooling-cells = <2>;
clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
<&gpucc GPU_CC_CXO_CLK>,
<&gcc GCC_BIMC_GPU_AXI_CLK>,
<&gpucc GPU_CC_AHB_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gpucc GPU_CC_CX_GMU_CLK>,
<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
clock-names = "core_clk", "rbbmtimer_clk", "mem_clk",
"iface_clk", "mem_iface_clk", "gmu_clk",
"smmu_vote";
/* Bus Scale Settings */
qcom,gpubw-dev = <&gpubw>;
qcom,bus-control;
qcom,msm-bus,name = "grp3d";
qcom,bus-width = <32>;
qcom,msm-bus,num-cases = <12>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<26 512 0 0>,
<26 512 0 800000>, /* 1 bus=100 (LOW SVS) */
<26 512 0 1600000>, /* 2 bus=200 (LOW SVS) */
<26 512 0 2400000>, /* 3 bus=300 (LOW SVS) */
<26 512 0 3608000>, /* 4 bus=451 (LOW SVS) */
<26 512 0 4376000>, /* 5 bus=547 (LOW SVS) */
<26 512 0 5448000>, /* 6 bus=681 (SVS) */
<26 512 0 6144000>, /* 7 bus=768 (SVS) */
<26 512 0 8136000>, /* 8 bus=1017 (SVS_L1) */
<26 512 0 10824000>, /* 9 bus=1353 (NOM) */
<26 512 0 12440000>, /* 10 bus=1555 (NOM) */
<26 512 0 14432000>; /* 11 bus=1804 (TURBO) */
/* GDSC regulator names */
regulator-names = "vddcx", "vdd";
/* GDSC oxili regulators */
vddcx-supply = <&gpu_cx_gdsc>;
vdd-supply = <&gpu_gx_gdsc>;
/* CPU latency parameter */
qcom,pm-qos-active-latency = <422>;
qcom,pm-qos-wakeup-latency = <422>;
/* Enable context aware freq. scaling */
qcom,enable-ca-jump;
/* Context aware jump busy penalty in us */
qcom,ca-busy-penalty = <12000>;
/* Context aware jump target power level */
qcom,ca-target-pwrlevel = <5>;
nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>;
nvmem-cell-names = "speed_bin", "gaming_bin";
qcom,gpu-cx-ipeak {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-cx-ipeak";
qcom,gpu-cx-ipeak@0 {
qcom,gpu-cx-ipeak = <&cx_ipeak_lm 10>;
qcom,gpu-cx-ipeak-freq = <950000000>;
};
qcom,gpu-cx-ipeak@1 {
qcom,gpu-cx-ipeak = <&cx_ipeak_lm 1>;
qcom,gpu-cx-ipeak-freq = <900000000>;
};
};
/* GPU Mempools */
qcom,gpu-mempools {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-mempools";
/* 4K Page Pool configuration */
qcom,gpu-mempool@0 {
reg = <0>;
qcom,mempool-page-size = <4096>;
qcom,mempool-allocate;
};
/* 8K Page Pool configuration */
qcom,gpu-mempool@1 {
reg = <1>;
qcom,mempool-page-size = <8192>;
qcom,mempool-allocate;
};
/* 64K Page Pool configuration */
qcom,gpu-mempool@2 {
reg = <2>;
qcom,mempool-page-size = <65536>;
qcom,mempool-reserved = <256>;
};
/* 1M Page Pool configuration */
qcom,gpu-mempool@3 {
reg = <3>;
qcom,mempool-page-size = <1048576>;
qcom,mempool-reserved = <32>;
};
};
/* GPU Mempool configuration for low memory SKUs */
qcom,gpu-mempools-lowmem {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-mempools-lowmem";
/* 4K Page Pool configuration */
qcom,gpu-mempool@0 {
reg = <0>;
qcom,mempool-page-size = <4096>;
qcom,mempool-allocate;
};
/* 8K Page Pool configuration */
qcom,gpu-mempool@1 {
reg = <1>;
qcom,mempool-page-size = <8192>;
qcom,mempool-allocate;
};
/* 64K Page Pool configuration */
qcom,gpu-mempool@2 {
reg = <2>;
qcom,mempool-page-size = <65536>;
qcom,mempool-allocate;
qcom,mempool-max-pages = <256>;
};
/* 1M Page Pool configuration */
qcom,gpu-mempool@3 {
reg = <3>;
qcom,mempool-page-size = <1048576>;
qcom,mempool-allocate;
qcom,mempool-max-pages = <32>;
};
};
/*
* Speed-bin zero is default speed bin.
* For rest of the speed bins, speed-bin value
* is calculated as FMAX/4.8 MHz round up to zero
* decimal places plus two margin to account for
* clock jitters.
*/
qcom,gpu-pwrlevel-bins {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-pwrlevel-bins";
qcom,gpu-pwrlevels-0 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <0>;
qcom,initial-pwrlevel = <6>;
qcom,ca-target-pwrlevel = <5>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <980000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <900000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <820000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <745000000>;
qcom,bus-freq = <9>;
qcom,bus-min = <8>;
qcom,bus-max = <10>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <600000000>;
qcom,bus-freq = <8>;
qcom,bus-min = <8>;
qcom,bus-max = <9>;
};
/* SVS */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <465000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
qcom,bus-max = <5>;
};
/* XO */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
qcom,bus-max = <0>;
};
};
qcom,gpu-pwrlevels-1 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <206>;
qcom,initial-pwrlevel = <6>;
qcom,ca-target-pwrlevel = <5>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <980000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <900000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <820000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <745000000>;
qcom,bus-freq = <9>;
qcom,bus-min = <8>;
qcom,bus-max = <10>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <600000000>;
qcom,bus-freq = <8>;
qcom,bus-min = <8>;
qcom,bus-max = <9>;
};
/* SVS */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <465000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
qcom,bus-max = <5>;
};
/* XO */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
qcom,bus-max = <0>;
};
};
qcom,gpu-pwrlevels-2 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <200>;
qcom,initial-pwrlevel = <6>;
qcom,ca-target-pwrlevel = <5>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <950000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <900000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <820000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* NOM */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <745000000>;
qcom,bus-freq = <9>;
qcom,bus-min = <8>;
qcom,bus-max = <10>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <600000000>;
qcom,bus-freq = <8>;
qcom,bus-min = <8>;
qcom,bus-max = <9>;
};
/* SVS */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <465000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
qcom,bus-max = <5>;
};
/* XO */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
qcom,bus-max = <0>;
};
};
qcom,gpu-pwrlevels-3 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <157>;
qcom,initial-pwrlevel = <3>;
qcom,ca-target-pwrlevel = <2>;
/* NOM */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <745000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <9>;
qcom,bus-max = <11>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <600000000>;
qcom,bus-freq = <8>;
qcom,bus-min = <8>;
qcom,bus-max = <10>;
};
/* SVS */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <465000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
qcom,bus-max = <5>;
};
/* XO */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
qcom,bus-max = <0>;
};
};
qcom,gpu-pwrlevels-4 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <127>;
qcom,initial-pwrlevel = <2>;
qcom,ca-target-pwrlevel = <1>;
/* SVS_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <600000000>;
qcom,bus-freq = <11>;
qcom,bus-min = <8>;
qcom,bus-max = <11>;
};
/* SVS */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <465000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <9>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <3>;
qcom,bus-max = <5>;
};
/* XO */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <0>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
qcom,bus-max = <0>;
};
};
};
};
kgsl_msm_iommu: qcom,kgsl-iommu@59a0000 {
compatible = "qcom,kgsl-smmu-v2";
reg = <0x59a0000 0x10000>;
qcom,protect = <0xa0000 0x10000>;
clocks = <&gcc GCC_BIMC_GPU_AXI_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
clock-names = "mem_clk", "mem_iface_clk", "smmu_vote";
qcom,retention;
qcom,hyp_secure_alloc;
gfx3d_user: gfx3d_user {
compatible = "qcom,smmu-kgsl-cb";
label = "gfx3d_user";
iommus = <&kgsl_smmu 0 1>;
qcom,iommu-dma = "disabled";
qcom,gpu-offset = <0xa8000>;
};
gfx3d_secure: gfx3d_secure {
compatible = "qcom,smmu-kgsl-cb";
label = "gfx3d_secure";
iommus = <&kgsl_smmu 2 0>;
qcom,iommu-dma = "disabled";
};
};
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP 1Gb DDR HD+";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 0x303>;
};

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/dts-v1/;
#include "bengal-low-ram.dtsi"
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP 1Gb DDR HD+";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 0x303>;
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP 2Gb DDR HD+";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 0x403>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_nt36525_truly_video>;
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="novatek,NVT-ts";
novatek@62 {
compatible = "novatek,NVT-ts";
reg = <0x62>;
status = "ok";
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
novatek,reset-gpio = <&tlmm 71 0x00>;
novatek,irq-gpio = <&tlmm 80 0x2008>;
panel = <&dsi_nt36525_truly_video>;
};
};

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/dts-v1/;
#include "bengal-low-ram.dtsi"
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP 2Gb DDR HD+";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 0x403>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_nt36525_truly_video>;
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="novatek,NVT-ts";
novatek@62 {
compatible = "novatek,NVT-ts";
reg = <0x62>;
status = "ok";
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
novatek,reset-gpio = <&tlmm 71 0x00>;
novatek,irq-gpio = <&tlmm 80 0x2008>;
panel = <&dsi_nt36525_truly_video>;
};
};

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#include "bengal-idp.dtsi"

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 0>;
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP AATC 1Gb DDR";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 0x301>;
};

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/dts-v1/;
#include "bengal-low-ram.dtsi"
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP AATC 1Gb DDR";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 0x301>;
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP AATC 2Gb DDR";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 0x401>;
};

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/dts-v1/;
#include "bengal-low-ram.dtsi"
#include "bengal-idp-low-ram.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP AATC 2Gb DDR";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 0x401>;
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp.dtsi"
#include "bengal-idp-usbc.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP USBC Audio";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,msm-id = <417 0x10000>, <444 0x10000>;
qcom,board-id = <34 1>;
};

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/dts-v1/;
#include "bengal.dtsi"
#include "bengal-idp.dtsi"
#include "bengal-idp-usbc.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP USBC Audio";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 1>;
};

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&bengal_snd {
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
};

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/dts-v1/;
#include "bengal.dtsi"
#include "bengal-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGAL IDP";
compatible = "qcom,bengal-idp", "qcom,bengal", "qcom,idp";
qcom,board-id = <34 0>;
};

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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "bengal-audio-overlay.dtsi"
#include "bengal-thermal-overlay.dtsi"
#include "bengal-sde-display.dtsi"
#include "camera/bengal-camera-sensor-idp.dtsi"
&soc {
mtp_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <15>;
#include "qg-batterydata-alium-3600mah.dtsi"
};
};
&qupv3_se1_i2c {
status = "ok";
#include "smb1355.dtsi"
};
&qupv3_se4_2uart {
status = "ok";
};
&pm6125_vadc {
pinctrl-0 = <&camera_therm_default &emmc_therm_default &rf_pa1_therm_default>;
rf_pa1_therm {
reg = <ADC_GPIO4_PU2>;
label = "rf_pa1_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm6125_adc_tm {
io-channels = <&pm6125_vadc ADC_AMUX_THM1_PU2>,
<&pm6125_vadc ADC_AMUX_THM2_PU2>,
<&pm6125_vadc ADC_XO_THERM_PU2>,
<&pm6125_vadc ADC_GPIO4_PU2>;
rf_pa1_therm {
reg = <ADC_GPIO4_PU2>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&thermal_zones {
rf-pa1-therm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC_GPIO4_PU2>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&pmi632_qg {
qcom,battery-data = <&mtp_batterydata>;
qcom,qg-iterm-ma = <100>;
qcom,hold-soc-while-full;
qcom,linearize-soc;
qcom,qg-use-s7-ocv;
};
&pmi632_charger {
qcom,battery-data = <&mtp_batterydata>;
qcom,suspend-input-on-debug-batt;
qcom,sw-jeita-enable;
qcom,step-charging-enable;
qcom,hvdcp2-max-icl-ua = <2000000>;
/* SMB1355 only */
qcom,sec-charger-config = <2>;
dpdm-supply = <&qusb_phy0>;
qcom,charger-temp-max = <800>;
qcom,smb-temp-max = <800>;
qcom,auto-recharge-soc = <98>;
qcom,flash-disable-soc = <10>;
qcom,hw-die-temp-mitigation;
qcom,hw-connector-mitigation;
qcom,connector-internal-pull-kohm = <100>;
qcom,float-option = <1>;
qcom,thermal-mitigation = <3000000 2500000
2000000 1500000 1000000 500000>;
};
&pmi632_gpios {
smb_en {
smb_en_default: smb_en_default {
pins = "gpio2";
function = "func1";
output-enable;
};
};
pmi632_sense {
/* GPIO 7 and 8 are external-sense pins for PMI632 */
pmi632_sense_default: pmi632_sense_default {
pins = "gpio7", "gpio8";
bias-high-impedance; /* disable the GPIO */
bias-disable; /* no-pull */
};
};
pmi632_ctm {
/* Disable GPIO1 for h/w base mitigation */
pmi632_ctm_default: pmi632_ctm_default {
pins = "gpio1";
bias-high-impedance; /* disable the GPIO */
bias-disable; /* no-pull */
};
};
};
&pm6125_gpios {
rf_pa1_therm {
rf_pa1_therm_default: rf_pa1_therm_default {
pins = "gpio7";
bias-high-impedance;
};
};
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio5";
function = "normal";
input-enable;
bias-pull-up;
power-source = <0>;
};
};
};
&usb0 {
extcon = <&pmi632_charger>, <&eud>;
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
linux,can-disable;
debounce-interval = <15>;
gpio-key,wakeup;
};
};
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 86 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&tlmm {
smb_int_default: smb_int_default {
mux {
pins = "gpio105";
function = "gpio";
};
config {
pins = "gpio105";
bias-pull-up;
input-enable;
};
};
};
&smb1355 {
pinctrl-names = "default";
pinctrl-0 = <&smb_int_default>;
interrupt-parent = <&tlmm>;
interrupts = <105 IRQ_TYPE_LEVEL_LOW>;
status = "ok";
};
&smb1355_charger {
pinctrl-names = "default";
pinctrl-0 = <&smb_en_default &pmi632_sense_default &pmi632_ctm_default>;
qcom,parallel-mode = <1>;
qcom,disable-ctm;
qcom,hw-die-temp-mitigation;
status = "ok";
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
vdd-io-bias-supply = <&L7A>;
qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
qcom,vdd-io-bias-current-level = <0 6000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v3-660";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L12A>; /* 1.8v */
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14200>;
status = "ok";
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&L11A>;
vcc-max-microamp = <600000>;
vccq2-max-microamp = <600000>;
vccq2-pwr-collapse-sup;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
status = "ok";
};
&pm6125_pwm {
status = "ok";
};
&dsi_td4330_truly_v2_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
pwms = <&pm6125_pwm 0 0>;
qcom,bl-pmic-pwm-period-usecs = <100>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>;
};
&dsi_td4330_truly_v2_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
pwms = <&pm6125_pwm 0 0>;
qcom,bl-pmic-pwm-period-usecs = <100>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-te-gpio = <&tlmm 81 0>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>;
};
&dsi_nt36525_truly_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
pwms = <&pm6125_pwm 0 0>;
qcom,bl-pmic-pwm-period-usecs = <100>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_td4330_truly_v2_video>;
};
&tlmm {
touch_vdd_default: touch_vdd_default {
mux {
pins = "gpio84";
function = "gpio";
};
config {
pins = "gpio84";
drive-strength = <8>;
bias-disable = <0>;
output-high;
};
};
};
&soc {
touch_vdd: touch_vdd {
compatible = "regulator-fixed";
regulator-name = "touch_vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&touch_vdd_default>;
};
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="synaptics,tcm-i2c";
synaptics_tcm@20 {
compatible = "synaptics,tcm-i2c";
reg = <0x20>;
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
synaptics,irq-gpio = <&tlmm 80 0x2008>;
synaptics,irq-on-state = <0>;
synaptics,reset-gpio = <&tlmm 71 0x00>;
synaptics,reset-on-state = <0>;
synaptics,reset-active-ms = <20>;
synaptics,reset-delay-ms = <200>;
synaptics,power-delay-ms = <200>;
synaptics,ubl-i2c-addr = <0x20>;
synaptics,extend_report;
synaptics,firmware-name = "synaptics_firmware_k.img";
panel = <&dsi_td4330_truly_v2_video &dsi_td4330_truly_v2_cmd>;
};
novatek@62 {
compatible = "novatek,NVT-ts";
reg = <0x62>;
status = "ok";
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
novatek,reset-gpio = <&tlmm 71 0x00>;
novatek,irq-gpio = <&tlmm 80 0x2008>;
panel = <&dsi_nt36525_truly_video>;
};
focaltech@38 {
compatible = "focaltech,fts_ts";
reg = <0x38>;
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
focaltech,reset-gpio = <&tlmm 71 0x00>;
focaltech,irq-gpio = <&tlmm 80 0x2008>;
focaltech,max-touch-number = <5>;
focaltech,display-coords = <0 0 1080 2340>;
vdd-supply = <&touch_vdd>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
};
};

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&soc {
qcom,ion {
compatible = "qcom,msm-ion";
#address-cells = <1>;
#size-cells = <0>;
system_heap: qcom,ion-heap@25 {
reg = <25>;
qcom,ion-heap-type = "SYSTEM";
};
system_secure_heap: qcom,ion-heap@9 {
reg = <9>;
qcom,ion-heap-type = "SYSTEM_SECURE";
};
qcom,ion-heap@10 { /* SECURE DISPLAY HEAP */
reg = <10>;
memory-region = <&secure_display_memory>;
qcom,ion-heap-type = "HYP_CMA";
};
qcom,ion-heap@14 { /* SECURE CARVEOUT HEAP */
reg = <14>;
qcom,ion-heap-type = "SECURE_CARVEOUT";
cdsp {
memory-region = <&cdsp_sec_mem>;
token = <0x20000000>;
};
};
qcom,ion-heap@26 { /* USER CONTIG HEAP */
reg = <26>;
memory-region = <&user_contig_mem>;
qcom,ion-heap-type = "DMA";
};
qcom,ion-heap@27 { /* QSEECOM HEAP */
reg = <27>;
memory-region = <&qseecom_mem>;
qcom,ion-heap-type = "DMA";
};
qcom,ion-heap@19 { /* QSEECOM HEAP */
reg = <19>;
memory-region = <&qseecom_ta_mem>;
qcom,ion-heap-type = "DMA";
};
};
};

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#include "bengal.dtsi"
/ {
};
/delete-node/ &hyp_mem;
/delete-node/ &xbl_aop_mem;
/delete-node/ &sec_apps_mem;
/delete-node/ &smem_mem;
/delete-node/ &removed_mem;
/delete-node/ &pil_modem_mem;
/delete-node/ &pil_video_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &pil_cdsp_mem;
/delete-node/ &pil_adsp_mem;
/delete-node/ &pil_ipa_fw_mem;
/delete-node/ &pil_ipa_gsi_mem;
/delete-node/ &pil_gpu_mem;
/delete-node/ &cdsp_sec_mem;
/delete-node/ &user_contig_mem;
/delete-node/ &qseecom_mem;
/delete-node/ &qseecom_ta_mem;
/delete-node/ &secure_display_memory;
/delete-node/ &disp_rdump_memory;
&reserved_memory {
hyp_mem: hyp_region@45700000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x45700000 0x0 0x600000>;
};
xbl_aop_mem: xbl_aop_region@45e00000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x45e00000 0x0 0x100000>;
};
sec_apps_mem: sec_apps_region@45fff000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x45fff000 0x0 0x1000>;
};
smem_mem: smem_region@46000000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x46000000 0x0 0x200000>;
};
pil_modem_mem: modem_region@4ab00000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x4ab00000 0x0 0x6900000>;
};
pil_video_mem: pil_video_region@51400000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x51400000 0x0 0x500000>;
};
wlan_msa_mem: wlan_msa_region@51900000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x51900000 0x0 0x100000>;
};
pil_cdsp_mem: cdsp_regions@51a00000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x51a00000 0x0 0x800000>;
};
pil_adsp_mem: pil_adsp_region@52200000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x52200000 0x0 0x1c00000>;
};
pil_ipa_fw_mem: ipa_fw_region@53e00000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x53e00000 0x0 0x10000>;
};
pil_ipa_gsi_mem: ipa_gsi_region@53e10000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x53e10000 0x0 0x5000>;
};
pil_gpu_mem: gpu_region@53e15000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x53e15000 0x0 0x2000>;
};
tz_stat_mem: tz_stat_region@60000000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x60000000 0x0 0x100000>;
};
removed_mem: removed_region@60100000 {
compatible = "removed-dma-pool";
no-map;
reg = <0x0 0x60100000 0x0 0x2200000>;
};
qseecom_mem: qseecom_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x1000000>;
};
qseecom_ta_mem: qseecom_ta_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x400000>;
};
linux,cma {
size = <0x0 0x1000000>;
};
};
&soc {
qcom,ion {
/delete-node/ qcom,ion-heap@14;
/delete-node/ qcom,ion-heap@10;
/delete-node/ qcom,ion-heap@26;
};
qcom_seecom: qseecom@61800000 {
reg = <0x61800000 0xb00000>;
};
qcom_smcinvoke: smcinvoke@61800000 {
reg = <0x61800000 0xb00000>;
};
};

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arch/arm64/boot/dts/vendor/qcom/bengal-pinctrl.dtsi vendored Normal file
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&soc {
qcom,lpm-levels {
compatible = "qcom,lpm-levels";
qcom,use-psci;
#address-cells = <1>;
#size-cells = <0>;
qcom,pm-cluster@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
label = "system";
qcom,spm-device-names = "cci";
qcom,psci-mode-shift = <8>;
qcom,psci-mode-mask = <0xf>;
qcom,pm-cluster-level@0 {
reg = <0>;
label = "system-wfi";
qcom,psci-mode = <0x0>;
qcom,entry-latency-us = <640>;
qcom,exit-latency-us = <1654>;
qcom,min-residency-us = <2294>;
};
qcom,pm-cluster-level@1 { /* E3 */
reg = <1>;
label = "system-pc";
qcom,psci-mode = <0x3>;
qcom,entry-latency-us = <10831>;
qcom,exit-latency-us = <4506>;
qcom,min-residency-us = <15338>;
qcom,min-child-idx = <2>;
qcom,notify-rpm;
qcom,is-reset;
};
qcom,pm-cluster@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
label = "pwr";
qcom,spm-device-names = "l2";
qcom,psci-mode-shift = <4>;
qcom,psci-mode-mask = <0xf>;
qcom,pm-cluster-level@0 { /* D1 */
reg = <0>;
label = "pwr-l2-wfi";
qcom,psci-mode = <0x1>;
qcom,entry-latency-us = <38>;
qcom,exit-latency-us = <51>;
qcom,min-residency-us = <89>;
};
qcom,pm-cluster-level@1 { /* D3G */
reg = <1>;
label = "pwr-l2-gdhs";
qcom,psci-mode = <0x2>;
qcom,entry-latency-us = <360>;
qcom,exit-latency-us = <421>;
qcom,min-residency-us = <782>;
qcom,min-child-idx = <1>;
};
qcom,pm-cluster-level@2 { /* D3 */
reg = <2>;
label = "pwr-l2-pc";
qcom,psci-mode = <0x4>;
qcom,entry-latency-us = <800>;
qcom,exit-latency-us = <2118>;
qcom,min-residency-us = <7376>;
qcom,min-child-idx = <1>;
qcom,is-reset;
};
qcom,pm-cpu {
#address-cells = <1>;
#size-cells = <0>;
qcom,psci-mode-shift = <0>;
qcom,psci-mode-mask = <0xf>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;
qcom,pm-cpu-level@0 { /* C1 */
reg = <0>;
label = "wfi";
qcom,psci-cpu-mode = <0x1>;
qcom,entry-latency-us = <49>;
qcom,exit-latency-us = <42>;
qcom,min-residency-us = <91>;
};
qcom,pm-cpu-level@1 { /* C3 */
reg = <1>;
label = "pc";
qcom,psci-cpu-mode = <0x3>;
qcom,entry-latency-us = <290>;
qcom,exit-latency-us = <376>;
qcom,min-residency-us = <1182>;
qcom,is-reset;
qcom,use-broadcast-timer;
};
};
};
qcom,pm-cluster@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
label = "perf";
qcom,spm-device-names = "l2";
qcom,psci-mode-shift = <4>;
qcom,psci-mode-mask = <0xf>;
qcom,pm-cluster-level@0 { /* D1 */
reg = <0>;
label = "perf-l2-wfi";
qcom,psci-mode = <0x1>;
qcom,entry-latency-us = <38>;
qcom,exit-latency-us = <51>;
qcom,min-residency-us = <89>;
};
qcom,pm-cluster-level@1 { /* D3G*/
reg = <1>;
label = "perf-l2-gdhs";
qcom,psci-mode = <2>;
qcom,entry-latency-us = <314>;
qcom,exit-latency-us = <345>;
qcom,min-residency-us = <660>;
qcom,min-child-idx = <1>;
};
qcom,pm-cluster-level@2 { /* D3 */
reg = <2>;
label = "perf-l2-pc";
qcom,psci-mode = <0x4>;
qcom,entry-latency-us = <640>;
qcom,exit-latency-us = <1654>;
qcom,min-residency-us = <8094>;
qcom,min-child-idx = <1>;
qcom,is-reset;
};
qcom,pm-cpu {
#address-cells = <1>;
#size-cells = <0>;
qcom,psci-mode-shift = <0>;
qcom,psci-mode-mask = <0xf>;
qcom,disable-ipi-prediction;
qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,pm-cpu-level@0 { /* C1 */
reg = <0>;
label = "wfi";
qcom,psci-cpu-mode = <0x1>;
qcom,entry-latency-us = <29>;
qcom,exit-latency-us = <39>;
qcom,min-residency-us = <68>;
};
qcom,pm-cpu-level@1 { /* C3 */
reg = <1>;
label = "pc";
qcom,psci-cpu-mode = <0x3>;
qcom,entry-latency-us = <297>;
qcom,exit-latency-us = <324>;
qcom,min-residency-us = <1110>;
qcom,is-reset;
qcom,use-broadcast-timer;
};
};
};
};
};
qcom,rpm-stats@4600000 {
compatible = "qcom,rpm-stats";
reg = <0x04600000 0x1000>,
<0x04690014 0x4>;
reg-names = "phys_addr_base", "offset_addr";
qcom,sleep-stats-version = <2>;
};
qcom,rpm-master-stats@45f0150 {
compatible = "qcom,rpm-master-stats";
reg = <0x45f0150 0x5000>;
qcom,masters = "APSS", "MPSS", "ADSP", "CDSP", "TZ";
qcom,master-stats-version = <2>;
qcom,master-offset = <4096>;
};
};

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/dts-v1/;
/plugin/;
#include "bengal-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal QRD";
compatible = "qcom,bengal-qrd", "qcom,bengal", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

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/dts-v1/;
#include "bengal.dtsi"
#include "bengal-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal QRD";
compatible = "qcom,bengal-qrd", "qcom,bengal", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "bengal-thermal-overlay.dtsi"
#include "bengal-audio-overlay.dtsi"
#include "bengal-sde-display.dtsi"
#include "camera/bengal-camera-sensor-qrd.dtsi"
&qupv3_se1_i2c {
status = "ok";
#include "smb1355.dtsi"
};
&soc {
qrd_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <15>;
#include "qg-batterydata-atl466271_3300mAh.dtsi"
};
};
&pmi632_qg {
qcom,battery-data = <&qrd_batterydata>;
qcom,qg-iterm-ma = <100>;
qcom,hold-soc-while-full;
qcom,linearize-soc;
qcom,qg-use-s7-ocv;
};
&pmi632_charger {
qcom,battery-data = <&qrd_batterydata>;
qcom,suspend-input-on-debug-batt;
qcom,sw-jeita-enable;
qcom,step-charging-enable;
/* SMB1355 only */
qcom,sec-charger-config = <2>;
qcom,hvdcp2-max-icl-ua = <2000000>;
dpdm-supply = <&qusb_phy0>;
qcom,charger-temp-max = <800>;
qcom,smb-temp-max = <800>;
qcom,auto-recharge-soc = <98>;
qcom,flash-disable-soc = <10>;
qcom,hw-die-temp-mitigation;
qcom,hw-connector-mitigation;
qcom,connector-internal-pull-kohm = <100>;
qcom,float-option = <1>;
qcom,thermal-mitigation = <4200000 3500000 3000000
2500000 2000000 1500000 1000000 500000>;
};
&pmi632_gpios {
smb_en {
smb_en_default: smb_en_default {
pins = "gpio2";
function = "func1";
output-enable;
};
};
pmi632_sense {
/* GPIO 7 and 8 are external-sense pins for PMI632 */
pmi632_sense_default: pmi632_sense_default {
pins = "gpio7", "gpio8";
bias-high-impedance; /* disable the GPIO */
bias-disable; /* no-pull */
};
};
pmi632_ctm {
/* Disable GPIO1 for h/w base mitigation */
pmi632_ctm_default: pmi632_ctm_default {
pins = "gpio1";
bias-high-impedance; /* disable the GPIO */
bias-disable; /* no-pull */
};
};
};
&pm6125_gpios {
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio5";
function = "normal";
input-enable;
bias-pull-up;
power-source = <0>;
};
};
};
&usb0 {
extcon = <&pmi632_charger>, <&eud>;
};
&qusb_phy0 {
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x81 0x88
0xc7 0x8c
0x30 0x08
0x79 0x0c
0x21 0x10
0x14 0x9c
0x80 0x04
0x9f 0x1c
0x00 0x18>;
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
linux,can-disable;
debounce-interval = <15>;
gpio-key,wakeup;
};
};
};
&bengal_snd {
qcom,model = "bengal-qrd-snd-card";
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
qcom,wcn-btfm = <1>;
qcom,ext-disp-audio-rx = <0>;
qcom,audio-routing =
"AMIC1", "MIC BIAS1",
"MIC BIAS1", "Analog Mic1",
"AMIC2", "MIC BIAS2",
"MIC BIAS2", "Analog Mic2",
"AMIC3", "MIC BIAS3",
"MIC BIAS3", "Analog Mic3",
"AMIC4", "MIC BIAS3",
"MIC BIAS3", "Analog Mic4",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"SpkrMono WSA_IN", "AUX",
"TX SWR_MIC0", "ADC1_OUTPUT",
"TX SWR_MIC4", "ADC2_OUTPUT",
"TX SWR_MIC5", "ADC3_OUTPUT",
"TX SWR_MIC0", "VA_TX_SWR_CLK",
"TX SWR_MIC1", "VA_TX_SWR_CLK",
"TX SWR_MIC2", "VA_TX_SWR_CLK",
"TX SWR_MIC3", "VA_TX_SWR_CLK",
"TX SWR_MIC4", "VA_TX_SWR_CLK",
"TX SWR_MIC5", "VA_TX_SWR_CLK",
"TX SWR_MIC6", "VA_TX_SWR_CLK",
"TX SWR_MIC7", "VA_TX_SWR_CLK",
"TX SWR_MIC8", "VA_TX_SWR_CLK",
"TX SWR_MIC9", "VA_TX_SWR_CLK",
"TX SWR_MIC10", "VA_TX_SWR_CLK",
"TX SWR_MIC11", "VA_TX_SWR_CLK",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"TX_AIF1 CAP", "VA_TX_SWR_CLK",
"TX_AIF2 CAP", "VA_TX_SWR_CLK",
"TX_AIF3 CAP", "VA_TX_SWR_CLK",
"VA SWR_MIC0", "ADC1_OUTPUT",
"VA SWR_MIC4", "ADC2_OUTPUT",
"VA SWR_MIC5", "ADC3_OUTPUT";
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
asoc-codec = <&stub_codec>, <&bolero>;
asoc-codec-names = "msm-stub-codec.1", "bolero_codec";
qcom,wsa-max-devs = <1>;
qcom,wsa-devs = <&wsa881x_i2c_e>;
qcom,wsa-aux-dev-prefix = "SpkrMono";
qcom,codec-max-aux-devs = <1>;
qcom,codec-aux-devs = <&wcd937x_codec>;
qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&bolero>,
<&lpi_tlmm>;
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 86 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
vdd-io-bias-supply = <&L7A>;
qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
qcom,vdd-io-bias-current-level = <0 6000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
status = "ok";
};
&tlmm {
smb_int_default: smb_int_default {
mux {
pins = "gpio105";
function = "gpio";
};
config {
pins = "gpio105";
bias-pull-up;
input-enable;
};
};
};
&smb1355 {
pinctrl-names = "default";
pinctrl-0 = <&smb_int_default>;
interrupt-parent = <&tlmm>;
interrupts = <105 IRQ_TYPE_LEVEL_LOW>;
status = "ok";
};
&smb1355_charger {
pinctrl-names = "default";
pinctrl-0 = <&smb_en_default &pmi632_sense_default &pmi632_ctm_default>;
qcom,parallel-mode = <1>;
qcom,disable-ctm;
qcom,hw-die-temp-mitigation;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v3-660";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L12A>; /* 1.8v */
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14200>;
status = "ok";
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&L11A>;
vcc-max-microamp = <600000>;
vccq2-max-microamp = <600000>;
vccq2-pwr-collapse-sup;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
status = "ok";
};
&pm6125_pwm {
status = "ok";
};
&dsi_td4330_truly_v2_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
pwms = <&pm6125_pwm 0 0>;
qcom,bl-pmic-pwm-period-usecs = <100>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>;
};
&dsi_td4330_truly_v2_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
pwms = <&pm6125_pwm 0 0>;
qcom,bl-pmic-pwm-period-usecs = <100>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,platform-te-gpio = <&tlmm 81 0>;
qcom,platform-reset-gpio = <&tlmm 82 0>;
qcom,platform-bklight-en-gpio = <&pmi632_gpios 6 0>;
};
&sde_dsi {
qcom,dsi-default-panel = <&dsi_td4330_truly_v2_video>;
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="synaptics,tcm-i2c";
synaptics_tcm@20 {
compatible = "synaptics,tcm-i2c";
reg = <0x20>;
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
synaptics,irq-gpio = <&tlmm 80 0x2008>;
synaptics,irq-on-state = <0>;
synaptics,reset-gpio = <&tlmm 71 0x00>;
synaptics,reset-on-state = <0>;
synaptics,reset-active-ms = <20>;
synaptics,reset-delay-ms = <200>;
synaptics,power-delay-ms = <200>;
synaptics,ubl-i2c-addr = <0x20>;
synaptics,extend_report;
synaptics,firmware-name = "synaptics_firmware_k.img";
panel = <&dsi_td4330_truly_v2_video &dsi_td4330_truly_v2_cmd>;
};
};
&thermal_zones {
quiet-therm-step {
status = "ok";
};
};
&tlmm {
fpc_reset_int: fpc_reset_int {
fpc_reset_low: reset_low {
mux {
pins = "gpio104";
function = "gpio";
};
config {
pins = "gpio104";
drive-strength = <2>;
bias-disable;
output-low;
};
};
fpc_reset_high: reset_high {
mux {
pins = "gpio104";
function = "gpio";
};
config {
pins = "gpio104";
drive-strength = <2>;
bias-disable;
output-high;
};
};
fpc_int_low: int_low {
mux {
pins = "gpio97";
function = "gpio";
};
config {
pins = "gpio97";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
};
&soc {
fingerprint: fpc1020 {
compatible = "fpc,fpc1020";
interrupt-parent = <&tlmm>;
interrupts = <97 0>;
fpc,gpio_rst = <&tlmm 104 0>;
fpc,gpio_irq = <&tlmm 97 0>;
fpc,enable-on-boot;
pinctrl-names = "fpc1020_reset_reset",
"fpc1020_reset_active",
"fpc1020_irq_active";
pinctrl-0 = <&fpc_reset_low>;
pinctrl-1 = <&fpc_reset_high>;
pinctrl-2 = <&fpc_int_low>;
};
};

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#include <dt-bindings/msm/msm-bus-ids.h>
&soc {
/* QUPv3_0 wrapper instance */
qupv3_0: qcom,qupv3_0_geni_se@4ac0000 {
compatible = "qcom,qupv3-geni-se";
reg = <0x4ac0000 0x2000>;
qcom,msm-bus,num-paths = <2>;
qcom,msm-bus,vectors-bus-ids =
<MSM_BUS_MASTER_QUP_CORE_0 MSM_BUS_SLAVE_QUP_CORE_0>,
<MSM_BUS_MASTER_QUP_0 MSM_BUS_SLAVE_EBI_CH0>;
qcom,vote-for-bw;
iommus = <&apps_smmu 0xe3 0x0>;
qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;
qcom,iommu-dma = "fastmap";
};
/* GPI Instance */
gpi_dma0: qcom,gpi-dma@4a00000 {
compatible = "qcom,gpi-dma";
#dma-cells = <5>;
reg = <0x4a00000 0x60000>;
reg-names = "gpi-top";
interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <10>;
qcom,gpii-mask = <0xf>;
qcom,ev-factor = <2>;
iommus = <&apps_smmu 0xf6 0x0>;
qcom,gpi-ee-offset = <0x10000>;
qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
status = "ok";
};
/* Debug UART Instance */
qupv3_se4_2uart: qcom,qup_uart@4a90000 {
compatible = "qcom,msm-geni-console";
reg = <0x4a90000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se4_2uart_active>;
pinctrl-1 = <&qupv3_se4_2uart_sleep>;
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* HS UART Instance */
qupv3_se3_4uart: qcom,qup_uart@4a8c000 {
compatible = "qcom,msm-geni-serial-hs";
reg = <0x4a8c000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
pinctrl-names = "default", "active", "sleep";
pinctrl-0 = <&qupv3_se3_default_ctsrtsrx>,
<&qupv3_se3_default_tx>;
pinctrl-1 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
<&qupv3_se3_tx>;
pinctrl-2 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
<&qupv3_se3_tx>;
interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
qcom,wrapper-core = <&qupv3_0>;
qcom,wakeup-byte = <0xFD>;
status = "disabled";
};
/* I2C Instance */
qupv3_se0_i2c: i2c@4a80000 {
compatible = "qcom,i2c-geni";
reg = <0x4a80000 0x4000>;
interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
dmas = <&gpi_dma0 0 0 3 64 0>,
<&gpi_dma0 1 0 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_i2c_active>;
pinctrl-1 = <&qupv3_se0_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* I2C Instance */
qupv3_se1_i2c: i2c@4a84000 {
compatible = "qcom,i2c-geni";
reg = <0x4a84000 0x4000>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
dmas = <&gpi_dma0 0 1 3 64 0>,
<&gpi_dma0 1 1 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_i2c_active>;
pinctrl-1 = <&qupv3_se1_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* I2C Instance */
qupv3_se2_i2c: i2c@4a88000 {
compatible = "qcom,i2c-geni";
reg = <0x4a88000 0x4000>;
interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
dmas = <&gpi_dma0 0 2 3 64 0>,
<&gpi_dma0 1 2 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se2_i2c_active>;
pinctrl-1 = <&qupv3_se2_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* SPI Instance */
qupv3_se0_spi: spi@4a80000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4a80000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_spi_active>;
pinctrl-1 = <&qupv3_se0_spi_sleep>;
interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 0 1 64 0>,
<&gpi_dma0 1 0 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
/* SPI Instance */
qupv3_se1_spi: spi@4a84000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4a84000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_spi_active>;
pinctrl-1 = <&qupv3_se1_spi_sleep>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 1 1 64 0>,
<&gpi_dma0 1 1 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
/* SPI Instance */
qupv3_se5_spi: spi@4a94000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4a94000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>,
<&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se5_spi_active>;
pinctrl-1 = <&qupv3_se5_spi_sleep>;
interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 5 1 64 0>,
<&gpi_dma0 1 5 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
};

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#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
&rpm_bus {
/* PM6125 S3/S4 - VDD_CX supply */
rpm-regulator-smpa3 {
status = "okay";
VDD_CX_LEVEL:
VDD_GFX_LEVEL:
VDD_MSS_LEVEL:
S3A_LEVEL: pm6125_s3_level: regulator-s3-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
VDD_CX_FLOOR_LEVEL:
VDD_MSS_FLOOR_LEVEL:
S3A_FLOOR_LEVEL:
pm6125_s3_floor_level: regulator-s3-floor-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_floor_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-floor-level;
qcom,always-send-voltage;
};
VDD_CX_LEVEL_AO:
VDD_MSS_LEVEL_AO:
S3A_LEVEL_AO: pm6125_s3_level_ao: regulator-s3-level-ao {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_level_ao";
qcom,set = <1>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
cx_cdev: cx-cdev-lvl {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&VDD_CX_FLOOR_LEVEL>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM
RPM_SMD_REGULATOR_LEVEL_NONE>;
#cooling-cells = <2>;
};
};
/* PM6125 S5 - VDD_MX/WCSS_MX supply */
rpm-regulator-smpa5 {
status = "okay";
VDD_MX_LEVEL:
S5A_LEVEL: pm6125_s5_level: regulator-s5-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
VDD_MX_FLOOR_LEVEL:
S5A_FLOOR_LEVEL:
pm6125_s5_floor_level: regulator-s5-floor-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_floor_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-floor-level;
qcom,always-send-voltage;
};
VDD_MX_LEVEL_AO:
S5A_LEVEL_AO: pm6125_s5_level_ao: regulator-s5-level-ao {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_level_ao";
qcom,set = <1>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
mx_cdev: mx-cdev-lvl {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&VDD_MX_LEVEL>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM
RPM_SMD_REGULATOR_LEVEL_NONE>;
#cooling-cells = <2>;
};
};
rpm-regulator-smpa6 {
status = "okay";
S6A: pm6125_s6: regulator-s6 {
regulator-min-microvolt = <304000>;
regulator-max-microvolt = <1456000>;
qcom,init-voltage = <304000>;
status = "okay";
};
};
rpm-regulator-smpa7 {
status = "okay";
S7A: pm6125_s7: regulator-s7 {
regulator-min-microvolt = <1280000>;
regulator-max-microvolt = <2080000>;
qcom,init-voltage = <1280000>;
status = "okay";
};
};
rpm-regulator-smpa8 {
status = "okay";
S8A: pm6125_s8: regulator-s8 {
regulator-min-microvolt = <1064000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1064000>;
status = "okay";
};
};
rpm-regulator-ldoa1 {
status = "okay";
L1A: pm6125_l1: regulator-l1 {
regulator-min-microvolt = <952000>;
regulator-max-microvolt = <1152000>;
qcom,init-voltage = <952000>;
status = "okay";
};
};
/* VDD_LPI_MX supply */
rpm-regulator-ldoa2 {
status = "okay";
qcom,resource-name = "rwlm";
qcom,resource-id = <0>;
L2A_LEVEL: pm6125_l2_level: regulator-l2-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l2_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
};
/* VDD_LPI_CX supply */
rpm-regulator-ldoa3 {
status = "okay";
qcom,resource-name = "rwlc";
qcom,resource-id = <0>;
L3A_LEVEL: pm6125_l3_level: regulator-l3-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l3_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
};
rpm-regulator-ldoa4 {
status = "okay";
L4A: pm6125_l4: regulator-l4 {
regulator-min-microvolt = <488000>;
regulator-max-microvolt = <1000000>;
qcom,init-voltage = <488000>;
status = "okay";
};
};
rpm-regulator-ldoa5 {
status = "okay";
L5A: pm6125_l5: regulator-l5 {
regulator-min-microvolt = <1648000>;
regulator-max-microvolt = <3056000>;
qcom,init-voltage = <1648000>;
status = "okay";
};
};
rpm-regulator-ldoa6 {
status = "okay";
L6A: pm6125_l6: regulator-l6 {
regulator-min-microvolt = <576000>;
regulator-max-microvolt = <656000>;
qcom,init-voltage = <576000>;
status = "okay";
};
};
rpm-regulator-ldoa7 {
status = "okay";
L7A: pm6125_l7: regulator-l7 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
/* WCSS_CX */
rpm-regulator-ldoa8 {
status = "okay";
L8A: pm6125_l8: regulator-l8 {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <728000>;
qcom,init-voltage = <400000>;
status = "okay";
};
};
rpm-regulator-ldoa9 {
status = "okay";
L9A: pm6125_l9: regulator-l9 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
};
rpm-regulator-ldoa10 {
status = "okay";
L10A: pm6125_l10: regulator-l10 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa11 {
status = "okay";
L11A: pm6125_l11: regulator-l11 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa12 {
status = "okay";
L12A: pm6125_l12: regulator-l12 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <1984000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa13 {
status = "okay";
L13A: pm6125_l13: regulator-l13 {
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1504000>;
status = "okay";
};
};
rpm-regulator-ldoa14 {
status = "okay";
L14A: pm6125_l14: regulator-l14 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa15 {
status = "okay";
L15A: pm6125_l15: regulator-l15 {
regulator-min-microvolt = <2920000>;
regulator-max-microvolt = <3232000>;
qcom,init-voltage = <2920000>;
status = "okay";
};
};
rpm-regulator-ldoa16 {
status = "okay";
L16A: pm6125_l16: regulator-l16 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa17 {
status = "okay";
L17A: pm6125_l17: regulator-l17 {
regulator-min-microvolt = <1152000>;
regulator-max-microvolt = <1384000>;
qcom,init-voltage = <1152000>;
status = "okay";
};
};
rpm-regulator-ldoa18 {
status = "okay";
L18A: pm6125_l18: regulator-l18 {
regulator-min-microvolt = <1104000>;
regulator-max-microvolt = <1312000>;
qcom,init-voltage = <1104000>;
status = "okay";
};
};
rpm-regulator-ldoa19 {
status = "okay";
L19A: pm6125_l19: regulator-l19 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa20 {
status = "okay";
L20A: pm6125_l20: regulator-l20 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa21 {
status = "okay";
L21A: pm6125_l21: regulator-l21 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <2400000>;
status = "okay";
};
};
rpm-regulator-ldoa22 {
status = "okay";
L22A: pm6125_l22: regulator-l22 {
regulator-min-microvolt = <2952000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <2952000>;
status = "okay";
};
};
rpm-regulator-ldoa23 {
status = "okay";
L23A: pm6125_l23: regulator-l23 {
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3400000>;
qcom,init-voltage = <3200000>;
status = "okay";
};
};
rpm-regulator-ldoa24 {
status = "okay";
L24A: pm6125_l24: regulator-l24 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <2704000>;
status = "okay";
};
};
};

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arch/arm64/boot/dts/vendor/qcom/bengal-rumi-overlay.dts vendored Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal RUMI";
compatible = "qcom,bengal-rumi", "qcom,bengal", "qcom,rumi";
qcom,msm-id = <417 0x10000>;
qcom,board-id = <15 0>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal-rumi.dts vendored Normal file
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/dts-v1/;
/memreserve/ 0x90000000 0x00000100;
#include "bengal.dtsi"
#include "bengal-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal RUMI";
compatible = "qcom,bengal-rumi", "qcom,bengal", "qcom,rumi";
qcom,board-id = <15 0>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal-rumi.dtsi vendored Normal file
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&soc {
usb_emu_phy: usb_emu_phy@4f20000 {
compatible = "qcom,usb-emu-phy";
reg = <0x04f20000 0x9500>,
<0x04ef8800 0x100>;
reg-names = "base", "qscratch_base";
qcom,emu-init-seq = <0xffff 0x4
0xfff0 0x4
0x100000 0x20
0x0 0x20
0x101f0 0x20
0x100000 0x3c
0x0 0x3c
0x10060 0x3c
0x0 0x4>;
};
timer {
clock-frequency = <500000>;
};
timer@f120000 {
clock-frequency = <500000>;
};
wdog: qcom,wdt@f017000 {
status = "disabled";
};
bi_tcxo: bi_tcxo {
compatible = "fixed-factor-clock";
clocks = <&xo_board>;
clock-mult = <1>;
clock-div = <1>;
#clock-cells = <0>;
};
bi_tcxo_ao: bi_tcxo_ao {
compatible = "fixed-factor-clock";
clocks = <&xo_board>;
clock-mult = <1>;
clock-div = <1>;
#clock-cells = <0>;
};
qmi-tmd-devices {
status = "disabled";
};
};
&qupv3_se1_i2c {
status = "disabled";
};
&rpm_bus {
rpm-standalone;
/delete-node/ rpm-regulator-smpa3;
/delete-node/ rpm-regulator-smpa5;
/delete-node/ rpm-regulator-smpa6;
/delete-node/ rpm-regulator-smpa7;
/delete-node/ rpm-regulator-smpa8;
/delete-node/ rpm-regulator-ldoa1;
/delete-node/ rpm-regulator-ldoa2;
/delete-node/ rpm-regulator-ldoa3;
/delete-node/ rpm-regulator-ldoa4;
/delete-node/ rpm-regulator-ldoa5;
/delete-node/ rpm-regulator-ldoa6;
/delete-node/ rpm-regulator-ldoa7;
/delete-node/ rpm-regulator-ldoa8;
/delete-node/ rpm-regulator-ldoa9;
/delete-node/ rpm-regulator-ldoa10;
/delete-node/ rpm-regulator-ldoa11;
/delete-node/ rpm-regulator-ldoa12;
/delete-node/ rpm-regulator-ldoa13;
/delete-node/ rpm-regulator-ldoa14;
/delete-node/ rpm-regulator-ldoa15;
/delete-node/ rpm-regulator-ldoa16;
/delete-node/ rpm-regulator-ldoa17;
/delete-node/ rpm-regulator-ldoa18;
/delete-node/ rpm-regulator-ldoa19;
/delete-node/ rpm-regulator-ldoa20;
/delete-node/ rpm-regulator-ldoa21;
/delete-node/ rpm-regulator-ldoa22;
/delete-node/ rpm-regulator-ldoa23;
/delete-node/ rpm-regulator-ldoa24;
};
&tsens0 {
status = "disabled";
};
&bcl_sensor {
status = "disabled";
};
&bcl_soc {
status = "disabled";
};
&lmh_cpu_vdd {
status = "disabled";
};
&cxip_cdev {
status = "disabled";
};
&lmh_dcvs0 {
status = "disabled";
};
&lmh_dcvs1 {
status = "disabled";
};
&thermal_zones {
/delete-node/ mapss-lowf;
/delete-node/ camera-lowf;
/delete-node/ pmi632-ibat-lvl0;
/delete-node/ pmi632-ibat-lvl1;
/delete-node/ pmi632-vbat-lvl0;
/delete-node/ pmi632-vbat-lvl1;
/delete-node/ pmi632-vbat-lvl2;
/delete-node/ pmi632-bcl-lvl0;
/delete-node/ pmi632-bcl-lvl1;
/delete-node/ pmi632-bcl-lvl2;
};
#include "bengal-stub-regulator.dtsi"
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000>;
qcom,bus-speed-mode = "DDR_1p8v";
/delete-property/qcom,devfreq,freq-table;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2950000>;
qcom,vdd-io-current-level = <0 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50";
/delete-property/qcom,devfreq,freq-table;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qrbtc-sdm845";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L12A>; /* 1.8v */
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14200>;
status = "ok";
};
&ufshc_mem {
limit-tx-hs-gear = <1>;
limit-rx-hs-gear = <1>;
scsi-cmd-timeout = <300000>;
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vccq2-supply = <&L11A>;
vcc-max-microamp = <600000>;
vccq2-max-microamp = <600000>;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
qcom,disable-lpm;
status = "ok";
};
&usb0 {
dpdm-supply = <&usb_nop_phy>;
dwc3@4e00000 {
usb-phy = <&usb_emu_phy>, <&usb_nop_phy>;
maximum-speed = "high-speed";
dr_mode = "peripheral";
};
};
&rpmcc {
compatible = "qcom,dummycc";
clock-output-names = "rpmcc_clocks";
#clock-cells = <1>;
#reset-cells = <1>;
};
&debugcc {
compatible = "qcom,dummycc";
clock-output-names = "debugcc_clocks";
};

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#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi"
#include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi"
#include "dsi-panel-nt36525-truly-hd-plus-vid.dtsi"
#include <dt-bindings/clock/mdss-14nm-pll-clk.h>
&pmi632_gpios {
disp_pins {
disp_pins_default: disp_pins_default {
pins = "gpio6";
function = "func1";
qcom,drive-strength = <2>;
power-source = <0>;
bias-disable;
output-low;
};
};
};
&soc {
dsi_panel_pwr_supply: dsi_panel_pwr_supply {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "lab";
qcom,supply-min-voltage = <4600000>;
qcom,supply-max-voltage = <6000000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
};
qcom,panel-supply-entry@2 {
reg = <2>;
qcom,supply-name = "ibb";
qcom,supply-min-voltage = <4600000>;
qcom,supply-max-voltage = <6000000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <100>;
qcom,supply-post-on-sleep = <20>;
};
};
dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
};
dsi_panel_pwr_supply_labibb_amoled: dsi_panel_pwr_supply_labibb_amoled {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <62000>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <20>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "vdda-3p3";
qcom,supply-min-voltage = <3000000>;
qcom,supply-max-voltage = <3000000>;
qcom,supply-enable-load = <13200>;
qcom,supply-disable-load = <80>;
};
};
sde_dsi: qcom,dsi-display-primary {
compatible = "qcom,dsi-display";
label = "primary";
qcom,dsi-ctrl = <&mdss_dsi0>;
qcom,dsi-phy = <&mdss_dsi_phy0>;
clocks = <&mdss_dsi0_pll BYTE0_MUX_CLK>,
<&mdss_dsi0_pll PIX0_MUX_CLK>,
<&mdss_dsi0_pll BYTE0_SRC_CLK>,
<&mdss_dsi0_pll PIX0_SRC_CLK>,
<&mdss_dsi0_pll SHADOW_BYTE0_SRC_CLK>,
<&mdss_dsi0_pll SHADOW_PIX0_SRC_CLK>;
clock-names = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
pinctrl-names = "panel_active", "panel_suspend";
pinctrl-0 = <&sde_dsi_active &sde_te_active>;
pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
qcom,platform-te-gpio = <&tlmm 81 0>;
qcom,panel-te-source = <0>;
vddio-supply = <&L9A>;
lab-supply = <&lcdb_ldo_vreg>;
ibb-supply = <&lcdb_ncp_vreg>;
qcom,mdp = <&mdss_mdp>;
qcom,dsi-default-panel =
<&dsi_td4330_truly_v2_video>;
};
sde_wb: qcom,wb-display@0 {
status = "disabled";
compatible = "qcom,wb-display";
cell-index = <0>;
label = "wb_display";
};
};
&mdss_mdp {
connectors = <&sde_dsi>;
};
&dsi_td4330_truly_v2_cmd {
qcom,mdss-dsi-t-clk-post = <0x0e>;
qcom,mdss-dsi-t-clk-pre = <0x36>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-on-check-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,dsi-dyn-clk-enable;
qcom,dsi-dyn-clk-list =
<944315056 928576464 932511112 936445760 940380400>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 1F 09 0B 06 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
qcom,partial-update-enabled = "single_roi";
qcom,panel-roi-alignment = <40 40 40 40 40 40>;
};
timing@1 {
qcom,mdss-dsi-panel-phy-timings =
[25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 1F 09 0A 06 03 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_td4330_truly_v2_video {
qcom,mdss-dsi-t-clk-post = <0x0e>;
qcom,mdss-dsi-t-clk-pre = <0x35>;
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
qcom,mdss-dsi-panel-status-value = <0x1c>;
qcom,mdss-dsi-panel-on-check-value = <0x1c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,dsi-supported-dfps-list = <60 55 48>;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update =
"dfps_immediate_porch_mode_vfp";
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
qcom,dsi-dyn-clk-enable;
qcom,dsi-dyn-clk-list =
<976190400 988392784 984325320 980257864>;
qcom,dsi-dyn-clk-type = "constant-fps-adjust-vfp";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 20 09 0A 06 03 04 a0
25 1F 09 0A 06 03 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
timing@1 {
qcom,mdss-dsi-panel-phy-timings =
[26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 20 09 0B 06 02 04 a0
26 1F 09 0B 06 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_nt36525_truly_video {
qcom,mdss-dsi-t-clk-post = <0x0a>;
qcom,mdss-dsi-t-clk-pre = <0x21>;
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
"src_byte_clk0", "src_pixel_clk0",
"shadow_byte_clk0", "shadow_pixel_clk0";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings =
[1F 1B 05 06 03 02 04 a0
1F 1B 05 06 03 02 04 a0
1F 1B 05 06 03 02 04 a0
1F 1B 05 06 03 02 04 a0
1F 10 04 06 03 02 04 a0];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};

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&soc {
mdss_dsi0_pll: qcom,mdss_dsi0_pll {
compatible = "qcom,mdss_dsi_pll_14nm";
label = "MDSS DSI 0 PLL";
cell-index = <0>;
#clock-cells = <1>;
reg = <0x5e94400 0x588>,
<0x5f03000 0x8>,
<0x5e94200 0x100>;
reg-names = "pll_base", "gdsc_base",
"dynamic_pll_base";
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;
clock-names = "iface_clk";
clock-rate = <0>;
memory-region = <&dfps_data_memory>;
gdsc-supply = <&mdss_core_gdsc>;
qcom,dsi-pll-ssc-en;
qcom,dsi-pll-ssc-mode = "down-spread";
qcom,platform-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
qcom,platform-supply-entry@0 {
reg = <0>;
qcom,supply-name = "gdsc";
qcom,supply-min-voltage = <0>;
qcom,supply-max-voltage = <0>;
qcom,supply-enable-load = <0>;
qcom,supply-disable-load = <0>;
};
};
};
};

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#include <dt-bindings/clock/mdss-14nm-pll-clk.h>
&soc {
mdss_mdp: qcom,mdss_mdp {
compatible = "qcom,sde-kms";
reg = <0x5e00000 0x8f030>,
<0x5eb0000 0x2008>,
<0x5e8f000 0x02c>,
<0xc125ba4 0x20>;
reg-names = "mdp_phys",
"vbif_phys",
"sid_phys",
"sde_imem_phys";
clocks =
<&gcc GCC_DISP_AHB_CLK>,
<&gcc GCC_DISP_HF_AXI_CLK>,
<&gcc GCC_DISP_THROTTLE_CORE_CLK>,
<&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>,
<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
<&dispcc DISP_CC_MDSS_ROT_CLK>;
clock-names = "gcc_iface", "gcc_bus", "throttle_clk",
"div_clk",
"iface_clk", "core_clk", "vsync_clk",
"lut_clk", "rot_clk";
clock-rate = <0 0 0 0 0 256000000 19200000 192000000 192000000>;
clock-max-rate = <0 0 0 0 0 384000000 19200000 384000000
307000000>;
sde-vdd-supply = <&mdss_core_gdsc>;
/* interrupt config */
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
#power-domain-cells = <0>;
/* hw blocks */
qcom,sde-off = <0x1000>;
qcom,sde-len = <0x494>;
qcom,sde-ctl-off = <0x2000>;
qcom,sde-ctl-size = <0x1dc>;
qcom,sde-ctl-display-pref = "primary";
qcom,sde-mixer-off = <0x45000>;
qcom,sde-mixer-size = <0x320>;
qcom,sde-mixer-display-pref = "primary";
qcom,sde-dspp-top-off = <0x1300>;
qcom,sde-dspp-top-size = <0x80>;
qcom,sde-dspp-off = <0x55000>;
qcom,sde-dspp-size = <0xfe4>;
qcom,sde-intf-off = <0x0 0x6b800>;
qcom,sde-intf-size = <0x2b8>;
qcom,sde-intf-type = "none", "dsi";
qcom,sde-pp-off = <0x71000>;
qcom,sde-pp-size = <0xd4>;
qcom,sde-dither-off = <0x30e0>;
qcom,sde-dither-version = <0x00010000>;
qcom,sde-dither-size = <0x20>;
qcom,sde-sspp-type = "vig", "dma";
qcom,sde-sspp-off = <0x5000 0x25000>;
qcom,sde-sspp-src-size = <0x1f8>;
qcom,sde-sspp-xin-id = <0 1>;
qcom,sde-sspp-excl-rect = <1 1>;
qcom,sde-sspp-smart-dma-priority = <2 1>;
qcom,sde-smart-dma-rev = "smart_dma_v2p5";
qcom,sde-mixer-pair-mask = <0>;
qcom,sde-mixer-blend-op-off = <0x20 0x38 0x50 0x68 0x80 0x98
0xb0 0xc8 0xe0 0xf8 0x110>;
qcom,sde-mixer-stage-base-layer;
qcom,sde-max-per-pipe-bw-kbps = <2600000 2600000>;
qcom,sde-max-per-pipe-bw-high-kbps = <2600000 2600000>;
/* offsets are relative to "mdp_phys + qcom,sde-off */
qcom,sde-sspp-clk-ctrl =
<0x2ac 0>, <0x2ac 8>;
qcom,sde-sspp-csc-off = <0x1a00>;
qcom,sde-csc-type = "csc-10bit";
qcom,sde-qseed-type = "qseedv3lite";
qcom,sde-sspp-qseed-off = <0xa00>;
qcom,sde-mixer-linewidth = <2048>;
qcom,sde-sspp-linewidth = <2160>;
qcom,sde-mixer-blendstages = <0x4>;
qcom,sde-highest-bank-bit = <0x1>;
qcom,sde-ubwc-version = <0x100>;
qcom,sde-ubwc-swizzle = <0x7>;
qcom,sde-ubwc-static = <0x11F>;
qcom,sde-panic-per-pipe;
qcom,sde-has-cdp;
qcom,sde-has-dim-layer;
qcom,sde-has-idle-pc;
qcom,sde-max-bw-low-kbps = <3100000>;
qcom,sde-max-bw-high-kbps = <4000000>;
qcom,sde-min-core-ib-kbps = <2400000>;
qcom,sde-min-llcc-ib-kbps = <800000>;
qcom,sde-min-dram-ib-kbps = <800000>;
qcom,sde-dram-channels = <1>;
qcom,sde-num-nrt-paths = <0>;
qcom,sde-vbif-off = <0>;
qcom,sde-vbif-size = <0x2008>;
qcom,sde-vbif-id = <0>;
qcom,sde-vbif-memtype-0 = <3 3 3 3 3 3 3 3>;
qcom,sde-vbif-memtype-1 = <3 3 3 3 3 3>;
qcom,sde-vbif-qos-rt-remap = <3 3 4 4 5 5 6 6>;
qcom,sde-vbif-qos-nrt-remap = <3 3 3 3 3 3 3 3>;
/*Pending macrotile & macrotile-qseed has the same configs */
qcom,sde-danger-lut = <0x000000ff 0x0000ffff
0x00000000 0x00000000 0x0000ffff>;
qcom,sde-safe-lut-linear = <0 0xfff0>;
qcom,sde-safe-lut-macrotile = <0 0xff00>;
/* same as safe-lut-macrotile */
qcom,sde-safe-lut-macrotile-qseed = <0 0xff00>;
qcom,sde-safe-lut-nrt = <0 0xffff>;
qcom,sde-qos-lut-linear = <0 0x00112222 0x22335777>;
qcom,sde-qos-lut-macrotile = <0 0x00112233 0x44556677>;
qcom,sde-qos-lut-macrotile-qseed = <0 0x00112233 0x66777777>;
qcom,sde-qos-lut-nrt = <0 0x00000000 0x00000000>;
qcom,sde-cdp-setting = <1 1>, <1 0>;
qcom,sde-qos-cpu-mask = <0x3>;
qcom,sde-qos-cpu-dma-latency = <300>;
qcom,sde-secure-sid-mask = <0x0000421>;
qcom,sde-num-mnoc-ports = <1>;
qcom,sde-axi-bus-width = <16>;
qcom,sde-sspp-vig-blocks {
qcom,sde-vig-csc-off = <0x1a00>;
qcom,sde-vig-qseed-off = <0xa00>;
qcom,sde-vig-qseed-size = <0xa0>;
qcom,sde-vig-inverse-pma;
};
qcom,sde-dspp-blocks {
qcom,sde-dspp-igc = <0x0 0x00030001>;
qcom,sde-dspp-hsic = <0x800 0x00010007>;
qcom,sde-dspp-memcolor = <0x880 0x00010007>;
qcom,sde-dspp-hist = <0x800 0x00010007>;
qcom,sde-dspp-sixzone= <0x900 0x00010007>;
qcom,sde-dspp-vlut = <0xa00 0x00010008>;
qcom,sde-dspp-pcc = <0x1700 0x00040000>;
qcom,sde-dspp-gc = <0x17c0 0x00010008>;
qcom,sde-dspp-dither = <0x82c 0x00010007>;
};
qcom,platform-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
qcom,platform-supply-entry@0 {
reg = <0>;
qcom,supply-name = "sde-vdd";
qcom,supply-min-voltage = <0>;
qcom,supply-max-voltage = <0>;
qcom,supply-enable-load = <0>;
qcom,supply-disable-load = <0>;
};
};
smmu_sde_unsec: qcom,smmu_sde_unsec_cb {
compatible = "qcom,smmu_sde_unsec";
iommus = <&apps_smmu 0x420 0x2>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-earlymap; /* for cont-splash */
};
smmu_sde_sec: qcom,smmu_sde_sec_cb {
compatible = "qcom,smmu_sde_sec";
iommus = <&apps_smmu 0x421 0x0>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xa>;
};
/* data and reg bus scale settings */
qcom,sde-data-bus {
qcom,msm-bus,name = "mdss_sde";
qcom,msm-bus,num-cases = <3>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<22 512 0 0>,
<22 512 0 4800000>,
<22 512 0 4800000>;
};
qcom,sde-reg-bus {
qcom,msm-bus,name = "mdss_reg";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<1 590 0 0>,
<1 590 0 76800>,
<1 590 0 150000>,
<1 590 0 300000>;
};
qcom,sde-limits {
qcom,sde-linewidth-limits {
qcom,sde-limit-name = "sspp_linewidth_usecases";
qcom,sde-limit-cases = "vig", "dma", "scale";
qcom,sde-limit-ids= <0x1 0x2 0x4>;
qcom,sde-limit-values = <0x1 4096>,
<0x5 2560>,
<0x2 2160>;
};
qcom,sde-bw-limits {
qcom,sde-limit-name = "sde_bwlimit_usecases";
qcom,sde-limit-cases = "per_vig_pipe",
"per_dma_pipe",
"total_max_bw",
"camera_concurrency";
qcom,sde-limit-ids = <0x1 0x2 0x4 0x8>;
qcom,sde-limit-values = <0x1 2600000>,
<0x9 2600000>,
<0x2 2600000>,
<0xa 2600000>,
<0x4 4000000>,
<0xc 3100000>;
};
};
};
mdss_rotator: qcom,mdss_rotator {
compatible = "qcom,sde_rotator";
reg = <0x5e00000 0xac000>,
<0x5eb0000 0x2008>;
reg-names = "mdp_phys",
"rot_vbif_phys";
#list-cells = <1>;
qcom,mdss-rot-mode = <1>;
/* Bus Scale Settings */
qcom,msm-bus,name = "mdss_rotator";
qcom,msm-bus,num-cases = <3>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<22 512 0 0>,
<22 512 0 6400000>,
<22 512 0 6400000>;
rot-vdd-supply = <&mdss_core_gdsc>;
qcom,supply-names = "rot-vdd";
clocks =
<&gcc GCC_DISP_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_ROT_CLK>;
clock-names = "gcc_iface",
"iface_clk", "rot_clk";
interrupt-parent = <&mdss_mdp>;
interrupts = <2 0>;
power-domains = <&mdss_mdp>;
/*Offline rotator RT setting */
qcom,mdss-rot-parent = <&mdss_mdp 0>;
qcom,mdss-rot-xin-id = <10 11>;
/* Offline rotator QoS setting */
qcom,mdss-rot-vbif-qos-setting = <3 3 3 3 3 3 3 3>;
qcom,mdss-rot-cdp-setting = <1 1>;
qcom,mdss-rot-qos-lut = <0x0 0x0 0x0 0x0>;
qcom,mdss-rot-danger-lut = <0x0 0x0>;
qcom,mdss-rot-safe-lut = <0x0000ffff 0x0000ffff>;
qcom,mdss-default-ot-rd-limit = <32>;
qcom,mdss-default-ot-wr-limit = <32>;
qcom,mdss-sbuf-headroom = <20>;
/* reg bus scale settings */
rot_reg: qcom,rot-reg-bus {
qcom,msm-bus,name = "mdss_rot_reg";
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<1 590 0 0>,
<1 590 0 76800>;
};
smmu_rot_unsec: qcom,smmu_rot_unsec_cb {
compatible = "qcom,smmu_sde_rot_unsec";
iommus = <&apps_smmu 0x43C 0x0>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
qcom,iommu-faults = "non-fatal";
};
smmu_rot_sec: qcom,smmu_rot_sec_cb {
compatible = "qcom,smmu_sde_rot_sec";
iommus = <&apps_smmu 0x43D 0x0>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xa>;
};
};
mdss_dsi0: qcom,mdss_dsi0_ctrl {
compatible = "qcom,dsi-ctrl-hw-v2.4";
label = "dsi-ctrl-0";
cell-index = <0>;
frame-threshold-time-us = <1000>;
reg = <0x5e94000 0x400>,
<0x5f08000 0x4>;
reg-names = "dsi_ctrl", "disp_cc_base";
interrupt-parent = <&mdss_mdp>;
interrupts = <4 0>;
vdda-1p2-supply = <&L18A>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
<&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>,
<&dispcc DISP_CC_MDSS_ESC0_CLK>;
clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
"pixel_clk", "pixel_clk_rcg",
"esc_clk";
qcom,ctrl-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
qcom,ctrl-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vdda-1p2";
qcom,supply-min-voltage = <1232000>;
qcom,supply-max-voltage = <1232000>;
qcom,supply-enable-load = <21800>;
qcom,supply-disable-load = <0>;
};
};
qcom,core-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
qcom,core-supply-entry@0 {
reg = <0>;
qcom,supply-name = "refgen";
qcom,supply-min-voltage = <0>;
qcom,supply-max-voltage = <0>;
qcom,supply-enable-load = <0>;
qcom,supply-disable-load = <0>;
};
};
};
mdss_dsi_phy0: qcom,mdss_dsi_phy0 {
compatible = "qcom,dsi-phy-v2.0";
label = "dsi-phy-0";
cell-index = <0>;
reg = <0x5e94400 0x588>,
<0x5e01400 0x100>,
<0x5e94200 0x100>;
reg-names = "dsi_phy", "phy_clamp_base",
"dyn_refresh_base";
vdda-0p9-supply = <&VDD_MX_LEVEL>;
qcom,platform-strength-ctrl = [ff 06
ff 06
ff 06
ff 06
ff 00];
qcom,platform-lane-config = [00 00 10 0f
00 00 10 0f
00 00 10 0f
00 00 10 0f
00 00 10 8f];
qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];
qcom,panel-allow-phy-poweroff;
qcom,phy-supply-entries {
#address-cells = <1>;
#size-cells = <0>;
qcom,phy-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vdda-0p9";
qcom,supply-min-voltage =
<RPM_SMD_REGULATOR_LEVEL_NOM>;
qcom,supply-max-voltage =
<RPM_SMD_REGULATOR_LEVEL_TURBO_NO_CPR>;
qcom,supply-off-min-voltage =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
qcom,supply-enable-load = <0>;
qcom,supply-disable-load = <0>;
};
};
};
};

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arch/arm64/boot/dts/vendor/qcom/bengal-stub-regulator.dtsi vendored Normal file
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
&soc {
S1A: pm6125_s1: regulator-pm6125-s1 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s1";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <465000>;
regulator-max-microvolt = <1155000>;
};
VDD_CX_LEVEL:
S3A_LEVEL: pm6125_s3_level: regulator-pm6125-s3-level {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s3_level";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
VDD_CX_LEVEL_AO:
S3A_LEVEL_AO: pm6125_s3_level_ao: regulator-pm6125-s3-level-ao {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s3_level_ao";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
VDD_MX_LEVEL:
S5A_LEVEL: pm6125_s5_level: regulator-pm6125-s5-level {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s5_level";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
VDD_MX_LEVEL_AO:
S5A_LEVEL_AO: pm6125_s5_level_ao: regulator-pm6125-s5-level-ao {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s5_level_ao";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
S6A: pm6125_s6: regulator-pm6125-s6 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s6";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1450000>;
};
S7A: pm6125_s7: regulator-pm6125-s7 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s7";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1270000>;
regulator-max-microvolt = <3369999>;
};
S8A: pm6125_s8: regulator-pm6125-s8 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_s8";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1060000>;
regulator-max-microvolt = <1300000>;
};
L1A: pm6125_l1: regulator-pm6125-l1 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l1";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1150000>;
};
L2A_LEVEL: pm6125_l2_level: regulator-pm6125-l2-level {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l2_level";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
L3A_LEVEL: pm6125_l3_level: regulator-pm6125-l3-level {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l3_level";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt = <RPMH_REGULATOR_LEVEL_MAX>;
};
L4A: pm6125_l4: regulator-pm6125-l4 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l4";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <488000>;
regulator-max-microvolt = <1000000>;
};
L5A: pm6125_l5: regulator-pm6125-l5 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l5";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <3050000>;
};
L6A: pm6125_l6: regulator-pm6125-l6 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l6";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <570000>;
regulator-max-microvolt = <650000>;
};
L7A: pm6125_l7: regulator-pm6125-l7 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l7";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
L8A: pm6125_l8: regulator-pm6125-l8 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l8";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <728000>;
};
L9A: pm6125_l9: regulator-pm6125-l9 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l9";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
};
L10A: pm6125_l10: regulator-pm6125-l10 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l10";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
};
L11A: pm6125_l11: regulator-pm6125-l11 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l11";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1950000>;
};
L12A: pm6125_l12: regulator-pm6125-l12 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l12";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <1980000>;
};
L13A: pm6125_l13: regulator-pm6125-l13 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l13";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3100000>;
};
L14A: pm6125_l14: regulator-pm6125-l14 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l14";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
};
L15A: pm6125_l15: regulator-pm6125-l15 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l15";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <2300000>;
regulator-max-microvolt = <3600000>;
};
L16A: pm6125_l16: regulator-pm6125-l16 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l16";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
};
L17A: pm6125_l17: regulator-pm6125-l17 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l17";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1150000>;
regulator-max-microvolt = <1380000>;
};
L18A: pm6125_l18: regulator-pm6125-l18 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l18";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1312500>;
};
L19A: pm6125_l19: regulator-pm6125-l19 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l19";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
};
L20A: pm6125_l20: regulator-pm6125-l20 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l20";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
};
L21A: pm6125_l21: regulator-pm6125-l21 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l21";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3600000>;
};
L22A: pm6125_l22: regulator-pm6125-l22 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l22";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <3300000>;
};
L23A: pm6125_l23: regulator-pm6125-l23 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l23";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3400000>;
};
L24A: pm6125_l24: regulator-pm6125-l24 {
compatible = "qcom,stub-regulator";
regulator-name = "pm6125_l24";
qcom,hpm-min-load = <10000>;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3600000>;
};
};

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#include <dt-bindings/thermal/thermal.h>
&thermal_zones {
pmi632-tz {
cooling-maps {
trip0_bat {
trip = <&pmi632_trip0>;
cooling-device =
<&pmi632_charger (THERMAL_MAX_LIMIT-1)
(THERMAL_MAX_LIMIT-1)>;
};
trip1_bat {
trip = <&pmi632_trip1>;
cooling-device =
<&pmi632_charger THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
};
};
pm6125-tz {
cooling-maps {
trip0_cpu0 {
trip = <&pm6125_trip0>;
cooling-device =
<&CPU0 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip0_cpu4 {
trip = <&pm6125_trip0>;
cooling-device =
<&CPU4 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip1_cpu1 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu1_isolate 1 1>;
};
trip1_cpu2 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu2_isolate 1 1>;
};
trip1_cpu3 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu3_isolate 1 1>;
};
trip1_cpu4 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu4_isolate 1 1>;
};
trip1_cpu5 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu5_isolate 1 1>;
};
trip1_cpu6 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu6_isolate 1 1>;
};
trip1_cpu7 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
pmi632-bcl-lvl0 {
cooling-maps {
cpu0_cdev {
trip = <&bcl_lvl0>;
cooling-device =
<&CPU0 (THERMAL_MAX_LIMIT-5)
(THERMAL_MAX_LIMIT-5)>;
};
cpu4_cdev {
trip = <&bcl_lvl0>;
cooling-device =
<&CPU4 (THERMAL_MAX_LIMIT-5)
(THERMAL_MAX_LIMIT-5)>;
};
};
};
pmi632-bcl-lvl1 {
cooling-maps {
cpu0_cdev {
trip = <&bcl_lvl1>;
cooling-device =
<&CPU0 (THERMAL_MAX_LIMIT-4)
(THERMAL_MAX_LIMIT-4)>;
};
cpu4_cdev {
trip = <&bcl_lvl1>;
cooling-device =
<&CPU4 (THERMAL_MAX_LIMIT-4)
(THERMAL_MAX_LIMIT-4)>;
};
cpu6_cdev {
trip = <&bcl_lvl1>;
cooling-device = <&cpu6_isolate 1 1>;
};
cpu7_cdev {
trip = <&bcl_lvl1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
pmi632-bcl-lvl2 {
cooling-maps {
cpu4_cdev {
trip = <&bcl_lvl2>;
cooling-device = <&cpu4_isolate 1 1>;
};
cpu5_cdev {
trip = <&bcl_lvl2>;
cooling-device = <&cpu5_isolate 1 1>;
};
};
};
soc {
cooling-maps {
soc_cpu0 {
trip = <&pmi632_low_soc>;
cooling-device =
<&CPU0 (THERMAL_MAX_LIMIT-4)
(THERMAL_MAX_LIMIT-4)>;
};
soc_cpu4 {
trip = <&pmi632_low_soc>;
cooling-device =
<&CPU4 (THERMAL_MAX_LIMIT-4)
(THERMAL_MAX_LIMIT-4)>;
};
soc_cpu6 {
trip = <&pmi632_low_soc>;
cooling-device = <&cpu6_isolate 1 1>;
};
soc_cpu7 {
trip = <&pmi632_low_soc>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
};
&mdss_mdp {
#cooling-cells = <2>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal-thermal.dtsi vendored Normal file
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#include <dt-bindings/clock/qcom,gcc-bengal.h>
#include <dt-bindings/msm/msm-bus-ids.h>
#include <dt-bindings/phy/qcom,usb3-11nm-qmp-combo.h>
&soc {
/* Primary USB port related controller */
usb0: ssusb@4e00000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0x4e00000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x120 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x50000000 0x60000000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event_irq", "ss_phy_irq", "hs_phy_irq";
clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"xo", "sleep_clk", "utmi_clk";
resets = <&gcc GCC_USB30_PRIM_BCR>;
reset-names = "core_reset";
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
dpdm-supply = <&qusb_phy0>;
qcom,core-clk-rate = <133333333>;
qcom,core-clk-rate-hs = <66666667>;
qcom,num-gsi-evt-buffs = <0x3>;
qcom,gsi-reg-offset =
<0x0fc /* GSI_GENERAL_CFG */
0x110 /* GSI_DBL_ADDR_L */
0x120 /* GSI_DBL_ADDR_H */
0x130 /* GSI_RING_BASE_ADDR_L */
0x144 /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */
qcom,dwc-usb3-msm-tx-fifo-size = <21288>;
qcom,gsi-disable-io-coherency;
qcom,msm-bus,name = "usb0";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <3>;
qcom,msm-bus,vectors-KBps =
/* suspend vote */
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 0>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 0>,
/* nominal vote */
<MSM_BUS_MASTER_USB3
MSM_BUS_SLAVE_EBI_CH0 240000 700000>,
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>,
/* svs vote */
<MSM_BUS_MASTER_USB3
MSM_BUS_SLAVE_EBI_CH0 240000 700000>,
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 0 2400>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 0 40000>,
/* min vote */
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_EBI_CH0 1 1>,
<MSM_BUS_MASTER_USB3 MSM_BUS_SLAVE_IPA_CFG 1 1>,
<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_USB3 1 1>;
dwc3@4e00000 {
compatible = "snps,dwc3";
reg = <0x4e00000 0xcd00>;
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&qusb_phy0>, <&usb_qmp_phy>;
tx-fifo-resize;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
usb-core-id = <0>;
maximum-speed = "super-speed";
dr_mode = "otg";
};
qcom,usbbam@0x04f04000 {
compatible = "qcom,usb-bam-msm";
reg = <0x04f04000 0x17000>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
qcom,usb-bam-fifo-baseaddr = <0xc121000>;
qcom,usb-bam-num-pipes = <4>;
qcom,disable-clk-gating;
qcom,usb-bam-override-threshold = <0x4001>;
qcom,usb-bam-max-mbps-highspeed = <400>;
qcom,usb-bam-max-mbps-superspeed = <3600>;
qcom,reset-bam-on-connect;
qcom,pipe0 {
label = "ssusb-qdss-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <0>;
qcom,peer-bam-physical-address = <0x08064000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x0>;
qcom,data-fifo-size = <0x1800>;
qcom,descriptor-fifo-offset = <0x1800>;
qcom,descriptor-fifo-size = <0x800>;
};
};
};
/* Primary USB port related High Speed PHY */
qusb_phy0: qusb@1613000 {
compatible = "qcom,qusb2phy";
reg = <0x01613000 0x180>,
<0x003cb250 0x4>,
<0x01b40258 0x4>,
<0x01612000 0x4>;
reg-names = "qusb_phy_base",
"tcsr_clamp_dig_n_1p8",
"tune2_efuse_addr",
"eud_enable_reg";
vdd-supply = <&pm6125_l4>;
vdda18-supply = <&pm6125_l12>;
vdda33-supply = <&pm6125_l15>;
qcom,vdd-voltage-level = <0 925000 970000>;
qcom,tune2-efuse-bit-pos = <25>;
qcom,tune2-efuse-num-bits = <4>;
qcom,qusb-phy-init-seq = <0xf8 0x80
0xb3 0x84
0x81 0x88
0xc0 0x8c
0x30 0x08
0x79 0x0c
0x21 0x10
0x14 0x9c
0x80 0x04
0x9f 0x1c
0x00 0x18>;
phy_type = "utmi";
qcom,phy-clk-scheme = "cmos";
qcom,major-rev = <1>;
clocks = <&rpmcc CXO_SMD_OTG_CLK>,
<&gcc GCC_AHB2PHY_USB_CLK>;
clock-names = "ref_clk_src", "cfg_ahb_clk";
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
reset-names = "phy_reset";
};
/* Primary USB port related QMP USB PHY */
usb_qmp_phy: ssphy@1615000 {
compatible = "qcom,usb-ssphy-qmp-usb3-or-dp";
reg = <0x01615000 0x1000>,
<0x03cb244 0x4>;
reg-names = "qmp_phy_base",
"vls_clamp_reg";
vdd-supply = <&pm6125_l4>;
core-supply = <&pm6125_l12>;
qcom,vdd-voltage-level = <0 925000 970000>;
qcom,core-voltage-level = <0 1800000 1800000>;
qcom,qmp-phy-init-seq =
/* <reg_offset, value, delay> */
<USB3PHY_QSERDES_COM_SYSCLK_EN_SEL 0x14 0x00
USB3PHY_QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x08 0x00
USB3PHY_QSERDES_COM_CLK_SELECT 0x30 0x00
USB3PHY_QSERDES_COM_SYS_CLK_CTRL 0x06 0x00
USB3PHY_QSERDES_COM_RESETSM_CNTRL 0x00 0x00
USB3PHY_QSERDES_COM_RESETSM_CNTRL2 0x08 0x00
USB3PHY_QSERDES_COM_BG_TRIM 0x0f 0x00
USB3PHY_QSERDES_COM_SVS_MODE_CLK_SEL 0x01 0x00
USB3PHY_QSERDES_COM_HSCLK_SEL 0x00 0x00
USB3PHY_QSERDES_COM_DEC_START_MODE0 0x82 0x00
USB3PHY_QSERDES_COM_DIV_FRAC_START1_MODE0 0x55 0x00
USB3PHY_QSERDES_COM_DIV_FRAC_START2_MODE0 0x55 0x00
USB3PHY_QSERDES_COM_DIV_FRAC_START3_MODE0 0x03 0x00
USB3PHY_QSERDES_COM_CP_CTRL_MODE0 0x0b 0x00
USB3PHY_QSERDES_COM_PLL_RCTRL_MODE0 0x16 0x00
USB3PHY_QSERDES_COM_PLL_CCTRL_MODE0 0x28 0x00
USB3PHY_QSERDES_COM_INTEGLOOP_GAIN0_MODE0 0x80 0x00
USB3PHY_QSERDES_COM_INTEGLOOP_GAIN1_MODE0 0x00 0x00
USB3PHY_QSERDES_COM_CORECLK_DIV 0x0a 0x00
USB3PHY_QSERDES_COM_LOCK_CMP1_MODE0 0x15 0x00
USB3PHY_QSERDES_COM_LOCK_CMP2_MODE0 0x34 0x00
USB3PHY_QSERDES_COM_LOCK_CMP3_MODE0 0x00 0x00
USB3PHY_QSERDES_COM_LOCK_CMP_EN 0x00 0x00
USB3PHY_QSERDES_COM_CORE_CLK_EN 0x00 0x00
USB3PHY_QSERDES_COM_LOCK_CMP_CFG 0x00 0x00
USB3PHY_QSERDES_COM_VCO_TUNE_MAP 0x00 0x00
USB3PHY_QSERDES_COM_BG_TIMER 0x0a 0x00
USB3PHY_QSERDES_COM_SSC_EN_CENTER 0x01 0x00
USB3PHY_QSERDES_COM_SSC_PER1 0x31 0x00
USB3PHY_QSERDES_COM_SSC_PER2 0x01 0x00
USB3PHY_QSERDES_COM_SSC_ADJ_PER1 0x00 0x00
USB3PHY_QSERDES_COM_SSC_ADJ_PER2 0x00 0x00
USB3PHY_QSERDES_COM_SSC_STEP_SIZE1 0xde 0x00
USB3PHY_QSERDES_COM_SSC_STEP_SIZE2 0x07 0x00
USB3PHY_QSERDES_COM_PLL_IVCO 0x0f 0x00
USB3PHY_QSERDES_COM_CMN_CONFIG 0x06 0x00
USB3PHY_QSERDES_COM_INTEGLOOP_INITVAL 0x80 0x00
USB3PHY_QSERDES_COM_BIAS_EN_CTRL_BY_PSM 0x01 0x00
USB3PHY_QSERDES_RXA_UCDR_FASTLOCK_FO_GAIN 0x0b 0x00
USB3PHY_QSERDES_RXB_UCDR_FASTLOCK_FO_GAIN 0x0b 0x00
USB3PHY_QSERDES_RXA_UCDR_PI_CONTROLS 0x00 0x00
USB3PHY_QSERDES_RXB_UCDR_PI_CONTROLS 0x00 0x00
USB3PHY_QSERDES_RXA_UCDR_FASTLOCK_COUNT_LOW 0x00 0x00
USB3PHY_QSERDES_RXB_UCDR_FASTLOCK_COUNT_LOW 0x00 0x00
USB3PHY_QSERDES_RXA_UCDR_FASTLOCK_COUNT_HIGH 0x00 0x00
USB3PHY_QSERDES_RXB_UCDR_FASTLOCK_COUNT_HIGH 0x00 0x00
USB3PHY_QSERDES_RXA_UCDR_FO_GAIN 0x0a 0x00
USB3PHY_QSERDES_RXB_UCDR_FO_GAIN 0x0a 0x00
USB3PHY_QSERDES_RXA_UCDR_SO_GAIN 0x06 0x00
USB3PHY_QSERDES_RXB_UCDR_SO_GAIN 0x06 0x00
USB3PHY_QSERDES_RXA_UCDR_SO_SATURATION_AND_ENABLE 0x75 0x00
USB3PHY_QSERDES_RXB_UCDR_SO_SATURATION_AND_ENABLE 0x75 0x00
USB3PHY_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL2 0x02 0x00
USB3PHY_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL2 0x02 0x00
USB3PHY_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL3 0x4e 0x00
USB3PHY_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL3 0x4e 0x00
USB3PHY_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL4 0x18 0x00
USB3PHY_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL4 0x18 0x00
USB3PHY_QSERDES_RXA_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0x00
USB3PHY_QSERDES_RXB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0x00
USB3PHY_QSERDES_RXA_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0x00
USB3PHY_QSERDES_RXB_RX_OFFSET_ADAPTOR_CNTRL2 0x80 0x00
USB3PHY_QSERDES_RXA_VGA_CAL_CNTRL2 0x0a 0x00
USB3PHY_QSERDES_RXB_VGA_CAL_CNTRL2 0x0a 0x00
USB3PHY_QSERDES_RXA_SIGDET_CNTRL 0x03 0x00
USB3PHY_QSERDES_RXB_SIGDET_CNTRL 0x03 0x00
USB3PHY_QSERDES_RXA_SIGDET_DEGLITCH_CNTRL 0x16 0x00
USB3PHY_QSERDES_RXB_SIGDET_DEGLITCH_CNTRL 0x16 0x00
USB3PHY_QSERDES_RXA_SIGDET_ENABLES 0x00 0x00
USB3PHY_QSERDES_RXB_SIGDET_ENABLES 0x00 0x00
USB3PHY_QSERDES_RXA_RX_MODE_00 0x00 0x00
USB3PHY_QSERDES_RXB_RX_MODE_00 0x00 0x00
USB3PHY_QSERDES_TXA_HIGHZ_DRVR_EN 0x10 0x00
USB3PHY_QSERDES_TXB_HIGHZ_DRVR_EN 0x10 0x00
USB3PHY_QSERDES_TXA_RCV_DETECT_LVL_2 0x12 0x00
USB3PHY_QSERDES_TXB_RCV_DETECT_LVL_2 0x12 0x00
USB3PHY_QSERDES_TXA_LANE_MODE_1 0xc6 0x00
USB3PHY_QSERDES_TXB_LANE_MODE_1 0xc6 0x00
USB3PHY_QSERDES_TXA_RES_CODE_LANE_OFFSET_TX 0x00 0x00
USB3PHY_QSERDES_TXB_RES_CODE_LANE_OFFSET_TX 0x00 0x00
USB3PHY_QSERDES_TXA_RES_CODE_LANE_OFFSET_RX 0x00 0x00
USB3PHY_QSERDES_TXB_RES_CODE_LANE_OFFSET_RX 0x00 0x00
USB3PHY_PCS_TXMGN_V0 0x9f 0x00
USB3PHY_PCS_TXDEEMPH_M6DB_V0 0x17 0x00
USB3PHY_PCS_TXDEEMPH_M3P5DB_V0 0x0f 0x00
USB3PHY_PCS_FLL_CNTRL2 0x83 0x00
USB3PHY_PCS_FLL_CNTRL1 0x02 0x00
USB3PHY_PCS_FLL_CNT_VAL_L 0x09 0x00
USB3PHY_PCS_FLL_CNT_VAL_H_TOL 0xa2 0x00
USB3PHY_PCS_FLL_MAN_CODE 0x85 0x00
USB3PHY_PCS_LOCK_DETECT_CONFIG1 0xd1 0x00
USB3PHY_PCS_LOCK_DETECT_CONFIG2 0x1f 0x00
USB3PHY_PCS_LOCK_DETECT_CONFIG3 0x47 0x00
USB3PHY_PCS_RXEQTRAINING_WAIT_TIME 0x75 0x00
USB3PHY_PCS_RXEQTRAINING_RUN_TIME 0x13 0x00
USB3PHY_PCS_LFPS_TX_ECSTART_EQTLOCK 0x86 0x00
USB3PHY_PCS_PWRUP_RESET_DLY_TIME_AUXCLK 0x04 0x00
USB3PHY_PCS_TSYNC_RSYNC_TIME 0x44 0x00
USB3PHY_PCS_RCVR_DTCT_DLY_P1U2_L 0xe7 0x00
USB3PHY_PCS_RCVR_DTCT_DLY_P1U2_H 0x03 0x00
USB3PHY_PCS_RCVR_DTCT_DLY_U3_L 0x40 0x00
USB3PHY_PCS_RCVR_DTCT_DLY_U3_H 0x00 0x00
USB3PHY_PCS_RX_SIGDET_LVL 0x88 0x00
0xffffffff 0xffffffff 0x00>;
qcom,qmp-phy-reg-offset =
<0xd74 /* USB3_PHY_PCS_STATUS */
0xcd8 /* USB3_PHY_AUTONOMOUS_MODE_CTRL */
0xcdc /* USB3_PHY_LFPS_RXTERM_IRQ_CLEAR */
0xc04 /* USB3_PHY_POWER_DOWN_CONTROL */
0xc00 /* USB3_PHY_SW_RESET */
0xc08 /* USB3_PHY_START */
0xa00>; /* USB3PHY_PCS_MISC_TYPEC_CTRL */
clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
<&rpmcc CXO_SMD_OTG_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
<&gcc GCC_AHB2PHY_USB_CLK>;
clock-names = "aux_clk", "pipe_clk", "ref_clk_src",
"ref_clk", "cfg_ahb_clk";
resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
<&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
reset-names = "phy_reset", "phy_phy_reset";
};
usb_nop_phy: usb_nop_phy {
compatible = "usb-nop-xceiv";
};
usb_audio_qmi_dev {
compatible = "qcom,usb-audio-qmi-dev";
iommus = <&apps_smmu 0x1cf 0x0>;
qcom,iommu-dma = "disabled";
qcom,usb-audio-stream-id = <0xf>;
qcom,usb-audio-intr-num = <2>;
};
};

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#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/msm/msm-bus-ids.h>
&soc {
msm_vidc: qcom,vidc@5a00000 {
compatible = "qcom,msm-vidc", "qcom,bengal-vidc";
status = "ok";
reg = <0x5a00000 0x200000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
/* Supply */
venus-supply = <&gcc_venus_gdsc>;
venus-core0-supply = <&gcc_vcodec0_gdsc>;
/* Clocks */
clock-names = "core_clk", "iface_clk", "bus_clk",
"core0_clk", "core0_bus_clk", "throttle_clk";
clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
<&gcc GCC_VIDEO_AHB_CLK>,
<&gcc GCC_VENUS_CTL_AXI_CLK>,
<&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
<&gcc GCC_VCODEC0_AXI_CLK>,
<&gcc GCC_VIDEO_THROTTLE_CORE_CLK>;
qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk",
"core0_clk", "core0_bus_clk", "throttle_clk";
qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>;
qcom,allowed-clock-rates = <133330000 240000000 300000000
384000000>;
/* Buses */
bus_cnoc {
compatible = "qcom,msm-vidc,bus";
label = "cnoc";
qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
qcom,mode = "performance";
qcom,bus-range-kbps = <1000 1000>;
};
venus_bus_ddr {
compatible = "qcom,msm-vidc,bus";
label = "venus-ddr";
qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;
qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;
qcom,mode = "vidc-ar50-ddr";
qcom,bus-range-kbps = <1000 2128000>;
};
arm9_bus_ddr {
compatible = "qcom,msm-vidc,bus";
label = "venus-arm9-ddr";
qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;
qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;
qcom,mode = "performance";
qcom,bus-range-kbps = <1000 1000>;
};
/* MMUs */
non_secure_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_ns";
iommus =
<&apps_smmu 0x860 0x00>,
<&apps_smmu 0x880 0x00>;
qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>;
qcom,iommu-faults = "non-fatal";
buffer-types = <0xfff>;
virtual-addr-pool = <0x70800000 0x6f800000>;
};
secure_bitstream_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_bitstream";
iommus =
<&apps_smmu 0x861 0x04>;
qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/
buffer-types = <0x241>;
virtual-addr-pool = <0x4b000000 0x25800000>;
qcom,secure-context-bank;
};
secure_pixel_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_pixel";
iommus =
<&apps_smmu 0x863 0x0>;
qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/
buffer-types = <0x106>;
virtual-addr-pool = <0x25800000 0x25800000>;
qcom,secure-context-bank;
};
secure_non_pixel_cb {
compatible = "qcom,msm-vidc,context-bank";
label = "venus_sec_non_pixel";
iommus =
<&apps_smmu 0x804 0xE0>;
qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/
buffer-types = <0x480>;
virtual-addr-pool = <0x1000000 0x24800000>;
qcom,secure-context-bank;
};
};
};

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/dts-v1/;
#include "bengal.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengal SoC";
compatible = "qcom,bengal";
qcom,board-id = <0 0>;
};

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arch/arm64/boot/dts/vendor/qcom/bengal.dtsi vendored Normal file
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arch/arm64/boot/dts/vendor/qcom/bengalp-idp-overlay.dts vendored Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "bengal-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGALP IDP";
compatible = "qcom,bengalp-idp", "qcom,bengalp", "qcom,idp";
qcom,msm-id = <445 0x10000>, <420 0x10000>;
qcom,board-id = <34 0>;
};

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arch/arm64/boot/dts/vendor/qcom/bengalp-idp.dts vendored Normal file
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/dts-v1/;
#include "bengalp.dtsi"
#include "bengal-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BENGALP IDP";
compatible = "qcom,bengalp-idp", "qcom,bengalp", "qcom,idp";
qcom,board-id = <34 0>;
};

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/dts-v1/;
#include "bengalp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengalp SoC";
compatible = "qcom,bengalp";
qcom,board-id = <0 0>;
};

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/dts-v1/;
#include "bengal.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Bengalp SoC";
compatible = "qcom,bengalp";
qcom,msm-id = <445 0x10000>, <420 0x10000>;
};
&soc {
qcom,rmnet-ipa {
status = "disabled";
};
};
&ipa_hw {
status = "disabled";
};

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arch/arm64/boot/dts/vendor/qcom/camera/bengal-camera-sensor-idp.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,gcc-bengal.h>
&soc {
led_flash_rear: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
led_flash_rear_aux2: qcom,camera-flash@2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend>;
gpios = <&tlmm 19 0>,
<&tlmm 21 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux2: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_rear2_reset_active>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_rear2_reset_suspend>;
gpios = <&tlmm 28 0>,
<&tlmm 65 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/* Rear*/
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0>;
rgltr-max-voltage = <1800000 2800000 1050000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Rear Aux*/
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
eeprom-src = <&eeprom_rear_aux>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend>;
gpios = <&tlmm 19 0>,
<&tlmm 21 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Front*/
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>,
<&tlmm 66 0>,
<&tlmm 67 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/*Rear Aux2*/
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
led-flash-src = <&led_flash_rear_aux2>;
eeprom-src = <&eeprom_rear_aux2>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_rear2_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_rear2_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 28 0>,
<&tlmm 65 0>,
<&tlmm 66 0>,
<&tlmm 67 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/bengal-camera-sensor-qrd.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,gcc-bengal.h>
&soc {
led_flash_rear: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
led_flash_rear_aux2: qcom,camera-flash@2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
flash-source = <&pmi632_flash0 &pmi632_flash1>;
torch-source = <&pmi632_torch0 &pmi632_torch1>;
switch-source = <&pmi632_switch0 &pmi632_switch0>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend>;
gpios = <&tlmm 21 0>,
<&tlmm 19 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux2: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_rear2_reset_active>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_rear2_reset_suspend>;
gpios = <&tlmm 28 0>,
<&tlmm 65 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/* Rear*/
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Rear Aux*/
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
eeprom-src = <&eeprom_rear_aux>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend>;
gpios = <&tlmm 21 0>,
<&tlmm 19 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Front*/
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>,
<&tlmm 66 0>,
<&tlmm 67 0>;
gpio-reset = <1>;
gpio-custom1 = <2>;
gpio-custom2 = <3>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_CSIMUX_OE0",
"CAM_CSIMUX_SEL0";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/*Rear Aux2*/
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
led-flash-src = <&led_flash_rear_aux2>;
eeprom-src = <&eeprom_rear_aux2>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_rear2_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_rear2_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 28 0>,
<&tlmm 65 0>,
<&tlmm 66 0>,
<&tlmm 67 0>;
gpio-reset = <1>;
gpio-custom1 = <2>;
gpio-custom2 = <3>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3",
"CAM_CSIMUX_OE1",
"CAM_CSIMUX_SEL1";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};

870
arch/arm64/boot/dts/vendor/qcom/camera/bengal-camera.dtsi vendored Executable file
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@ -0,0 +1,870 @@
#include <dt-bindings/msm/msm-camera.h>
&soc {
qcom,cam-req-mgr {
compatible = "qcom,cam-req-mgr";
status = "ok";
};
cam_csiphy0: qcom,csiphy0 {
cell-index = <0>;
compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
reg = <0x05C52000 0x1000>;
reg-names = "csiphy";
reg-cam-base = <0x52000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr";
gdscr-supply = <&gcc_camss_top_gdsc>;
csi-vdd-voltage = <1200000>;
mipi-csi-vdd-supply = <&L18A>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_0_CLK>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy0_clk",
"csi0phytimer_clk_src",
"csi0phytimer_clk";
src-clock-name = "csi0phytimer_clk_src";
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
clock-rates =
<19200000 0 19200000 0>,
<341330000 0 200000000 0>,
<341330000 0 200000000 0>,
<384000000 0 268800000 0>;
status = "ok";
};
cam_csiphy1: qcom,csiphy1 {
cell-index = <1>;
compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
reg = <0x05C53000 0x1000>;
reg-names = "csiphy";
reg-cam-base = <0x53000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr";
gdscr-supply = <&gcc_camss_top_gdsc>;
csi-vdd-voltage = <1200000>;
mipi-csi-vdd-supply = <&L18A>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_1_CLK>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy1_clk",
"csi1phytimer_clk_src",
"csi1phytimer_clk";
src-clock-name = "csi1phytimer_clk_src";
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
clock-rates =
<19200000 0 19200000 0>,
<341330000 0 200000000 0>,
<341330000 0 200000000 0>,
<384000000 0 268800000 0>;
status = "ok";
};
cam_csiphy2: qcom,csiphy2 {
cell-index = <2>;
compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
reg = <0x05C54000 0x1000>;
reg-names = "csiphy";
reg-cam-base = <0x54000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr";
gdscr-supply = <&gcc_camss_top_gdsc>;
csi-vdd-voltage = <1200000>;
mipi-csi-vdd-supply = <&L18A>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_2_CLK>,
<&gcc GCC_CAMSS_CSI2PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy2_clk",
"csi2phytimer_clk_src",
"csi2phytimer_clk";
src-clock-name = "csi2phytimer_clk_src";
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
clock-rates =
<19200000 0 19200000 0>,
<341330000 0 200000000 0>,
<341330000 0 200000000 0>,
<384000000 0 268800000 0>;
status = "ok";
};
cam_cci0: qcom,cci0 {
cell-index = <0>;
compatible = "qcom,cci";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x05C1B000 0x1000>;
reg-names = "cci";
reg-cam-base = <0x1B000>;
interrupt-names = "cci";
interrupts = <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>;
status = "ok";
gdscr-supply = <&gcc_camss_top_gdsc>;
regulator-names = "gdscr";
clocks = <&gcc GCC_CAMSS_CCI_0_CLK>,
<&gcc GCC_CAMSS_CCI_CLK_SRC>;
clock-names = "cci_0_clk",
"cci_0_clk_src";
src-clock-name = "cci_0_clk_src";
clock-cntl-level = "svs";
clock-rates = <0 37500000>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cci0_active &cci1_active>;
pinctrl-1 = <&cci0_suspend &cci1_suspend>;
gpios = <&tlmm 22 0>,
<&tlmm 23 0>,
<&tlmm 29 0>,
<&tlmm 30 0>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 1 1 1>;
gpio-req-tbl-label = "CCI_I2C_DATA0",
"CCI_I2C_CLK0",
"CCI_I2C_DATA1",
"CCI_I2C_CLK1";
i2c_freq_100Khz_cci0: qcom,i2c_standard_mode {
hw-thigh = <201>;
hw-tlow = <174>;
hw-tsu-sto = <204>;
hw-tsu-sta = <231>;
hw-thd-dat = <22>;
hw-thd-sta = <162>;
hw-tbuf = <227>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_400Khz_cci0: qcom,i2c_fast_mode {
hw-thigh = <38>;
hw-tlow = <56>;
hw-tsu-sto = <40>;
hw-tsu-sta = <40>;
hw-thd-dat = <22>;
hw-thd-sta = <35>;
hw-tbuf = <62>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_custom_cci0: qcom,i2c_custom_mode {
hw-thigh = <38>;
hw-tlow = <56>;
hw-tsu-sto = <40>;
hw-tsu-sta = <40>;
hw-thd-dat = <22>;
hw-thd-sta = <35>;
hw-tbuf = <62>;
hw-scl-stretch-en = <1>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode {
hw-thigh = <16>;
hw-tlow = <22>;
hw-tsu-sto = <17>;
hw-tsu-sta = <18>;
hw-thd-dat = <16>;
hw-thd-sta = <15>;
hw-tbuf = <24>;
hw-scl-stretch-en = <0>;
hw-trdhld = <3>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
};
qcom,cam_smmu {
compatible = "qcom,msm-cam-smmu";
status = "ok";
msm_cam_smmu_tfe {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x400 0x000>,
<&apps_smmu 0x401 0x000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
label = "tfe";
tfe_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_ope {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x820 0x000>,
<&apps_smmu 0x821 0x020>,
<&apps_smmu 0x840 0x000>,
<&apps_smmu 0x841 0x000>;
qcom,iommu-faults = "non-fatal";
multiple-client-devices;
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
label = "ope", "ope-cdm0";
ope_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_cpas_cdm {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x800 0x000>,
<&apps_smmu 0x801 0x020>;
label = "cpas-cdm0";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
cpas_cdm_iova_mem_map: iova-mem-map {
iova-mem-region-io {
/* IO region is approximately 3.4 GB */
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_secure {
compatible = "qcom,msm-cam-smmu-cb";
label = "cam-secure";
qcom,secure-cb;
};
};
qcom,cam-cpas@5c11000 {
cell-index = <0>;
compatible = "qcom,cam-cpas";
label = "cpas";
arch-compat = "cpas_top";
status = "ok";
reg-names = "cam_cpas_top", "cam_camnoc";
reg = <0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x11000 0x13000>;
interrupt-names = "cpas_camnoc";
interrupts = <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>;
camnoc-axi-min-ib-bw = <3000000000>; /*Need to be verified*/
regulator-names = "camss-vdd";
camss-vdd-supply = <&gcc_camss_top_gdsc>;
clock-names =
"gcc_camss_ahb_clk",
"gcc_camss_top_ahb_clk",
"gcc_camss_top_ahb_clk_src",
"gcc_camss_axi_clk",
"gcc_camss_axi_clk_src";
clocks =
<&gcc GCC_CAMERA_AHB_CLK>,
<&gcc GCC_CAMSS_TOP_AHB_CLK>,
<&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>,
<&gcc GCC_CAMSS_AXI_CLK>,
<&gcc GCC_CAMSS_AXI_CLK_SRC>;
src-clock-name = "gcc_camss_axi_clk_src";
clock-rates =
<0 0 0 0 0>,
<0 80000000 80000000 19200000 19200000>,
<0 80000000 80000000 150000000 150000000>,
<0 80000000 80000000 200000000 200000000>,
<0 80000000 80000000 300000000 300000000>,
<0 80000000 80000000 300000000 300000000>,
<0 80000000 80000000 300000000 300000000>;
clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs",
"svs_l1", "nominal", "turbo";
control-camnoc-axi-clk;
camnoc-bus-width = <32>;
camnoc-axi-clk-bw-margin-perc = <20>;
qcom,msm-bus,name = "cam_ahb"; /*Need to verify*/
qcom,msm-bus,num-cases = <7>; /*Need to verify*/
qcom,msm-bus,num-paths = <1>; /*Need to verify*/
qcom,msm-bus,vectors-KBps = /*Need to verify*/
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 76800>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 76800>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 300000>;
vdd-corners = <RPMH_REGULATOR_LEVEL_RETENTION
RPMH_REGULATOR_LEVEL_MIN_SVS
RPMH_REGULATOR_LEVEL_LOW_SVS
RPMH_REGULATOR_LEVEL_SVS
RPMH_REGULATOR_LEVEL_SVS_L1
RPMH_REGULATOR_LEVEL_NOM
RPMH_REGULATOR_LEVEL_NOM_L1
RPMH_REGULATOR_LEVEL_NOM_L2
RPMH_REGULATOR_LEVEL_TURBO
RPMH_REGULATOR_LEVEL_TURBO_L1>;
vdd-corner-ahb-mapping = "suspend", "minsvs",
"lowsvs", "svs", "svs_l1",
"nominal", "nominal", "nominal",
"turbo", "turbo";
client-id-based;
client-names =
"csiphy0", "csiphy1", "csiphy2", "cci0",
"csid0", "csid1", "csid2", "tfe0",
"tfe1", "tfe2", "ope0", "cam-cdm-intf0",
"cpas-cdm0", "ope-cdm0", "tpg0", "tpg1";
camera-bus-nodes {
level2-nodes {
level-index = <2>;
level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum {
cell-index = <0>;
node-name = "level2-rt0-rd-wr-sum";
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
qcom,axi-port-name = "cam_hf_0";
ib-bw-voting-needed;
qcom,axi-port-mnoc {
qcom,msm-bus,name =
"cam_hf_0_mnoc";
qcom,msm-bus-vector-dyn-vote;
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>;
};
};
level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum {
cell-index = <1>;
node-name = "level2-nrt0-rd-wr-sum";
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
qcom,axi-port-name = "cam_sf_0";
qcom,axi-port-mnoc {
qcom,msm-bus,name =
"cam_sf_0_mnoc";
qcom,msm-bus-vector-dyn-vote;
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_CAMNOC_SF
MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_CAMNOC_SF
MSM_BUS_SLAVE_EBI_CH0 0 0>;
};
};
};
level1-nodes {
level-index = <1>;
camnoc-max-needed;
level1_rt0_wr: level1-rt0-wr {
cell-index = <2>;
node-name = "level1-rt0-wr";
parent-node = <&level2_rt0_rd_wr_sum>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE>;
};
level1_nrt0_rd_wr: level1-nrt0-rd-wr {
cell-index = <3>;
node-name = "level1-nrt0-rd-wr";
parent-node = <&level2_nrt0_rd_wr_sum>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE>;
};
};
level0-nodes {
level-index = <0>;
ope0_all_wr: ope0-all-wr {
cell-index = <4>;
node-name = "ope0-all-wr";
client-name = "ope0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
parent-node = <&level1_nrt0_rd_wr>;
};
ope0_all_rd: ope0-all-rd {
cell-index = <5>;
node-name = "ope0-all-rd";
client-name = "ope0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
parent-node = <&level1_nrt0_rd_wr>;
};
tfe0_all_wr: tfe0-all-wr {
cell-index = <6>;
node-name = "tfe0-all-wr";
client-name = "tfe0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_RDI0
CAM_CPAS_PATH_DATA_IFE_RDI1
CAM_CPAS_PATH_DATA_IFE_RDI2
CAM_CPAS_PATH_DATA_IFE_RDI3
CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr>;
};
tfe1_all_wr: tfe1-all-wr {
cell-index = <7>;
node-name = "tfe1-all-wr";
client-name = "tfe1";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_RDI0
CAM_CPAS_PATH_DATA_IFE_RDI1
CAM_CPAS_PATH_DATA_IFE_RDI2
CAM_CPAS_PATH_DATA_IFE_RDI3
CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr>;
};
tfe2_all_wr: tfe2-all-wr {
cell-index = <8>;
node-name = "tfe2-all-wr";
client-name = "tfe2";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_RDI0
CAM_CPAS_PATH_DATA_IFE_RDI1
CAM_CPAS_PATH_DATA_IFE_RDI2
CAM_CPAS_PATH_DATA_IFE_RDI3
CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr>;
};
cpas_cdm0_all_rd: cpas-cdm0-all-rd {
cell-index = <9>;
node-name = "cpas-cdm0-all-rd";
client-name = "cpas-cdm0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
parent-node = <&level1_nrt0_rd_wr>;
};
ope_cdm0_all_rd: ope-cdm0-all-rd {
cell-index = <10>;
node-name = "ope-cdm0-all-rd";
client-name = "ope-cdm0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
parent-node = <&level1_nrt0_rd_wr>;
};
};
};
};
qcom,cam-cdm-intf {
compatible = "qcom,cam-cdm-intf";
cell-index = <0>;
label = "cam-cdm-intf";
num-hw-cdm = <2>;
cdm-client-names = "vfe";
status = "ok";
};
cam_cpas_cdm: qcom,cpas-cdm0@5c23000 {
cell-index = <0>;
compatible = "qcom,cam-cpas-cdm2_0";
label = "cpas-cdm";
reg = <0x5c23000 0x400>;
reg-names = "cpas-cdm0";
reg-cam-base = <0x23000>;
interrupts = <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "cpas-cdm0";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names = "cam_cc_cpas_top_ahb_clk";
clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>;
clock-rates = <0>;
clock-cntl-level = "svs";
cdm-client-names = "tfe0", "tfe1", "tfe2";
config-fifo;
fifo-depths = <64 64 64 64>;
status = "ok";
};
cam_ope_cdm: qcom,ope-cdm0@5c42000 {
cell-index = <0>;
compatible = "qcom,cam-ope-cdm2_0";
label = "ope-cdm";
reg = <0x5c42000 0x400>;
reg-names = "ope-cdm0";
reg-cam-base = <0x42000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ope-cdm0";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"ope_ahb_clk",
"ope_clk_src",
"ope_clk";
clocks =
<&gcc GCC_CAMSS_OPE_AHB_CLK>,
<&gcc GCC_CAMSS_OPE_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_CLK>;
clock-rates = <0 0 0>,
<0 0 0>,
<0 0 0>,
<0 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
cdm-client-names = "ope";
config-fifo;
fifo-depths = <64 64 64 64>;
status = "ok";
};
qcom,cam-isp {
compatible = "qcom,cam-isp";
arch-compat = "tfe";
status = "ok";
};
cam_tfe_csid0: qcom,tfe_csid0@5c6e000 {
cell-index = <0>;
compatible = "qcom,csid530";
reg-names = "csid", "top", "camnoc";
reg = <0x5c6e000 0x5000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x6e000 0x11000 0x13000>;
interrupt-names = "csid0";
interrupts = <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<240000000 240000000 0 240000000 256000000 256000000 150000000>,
<384000000 384000000 0 341333333 460800000 460800000 200000000>,
<426400000 426400000 0 384000000 576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe0: qcom,tfe0@5c6e000 {
cell-index = <0>;
compatible = "qcom,tfe530";
reg-names = "tfe0";
reg = <0x5c6e000 0x5000>;
reg-cam-base = <0x6e000>;
interrupt-names = "tfe0";
interrupts = <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<256000000 256000000 150000000>,
<460800000 460800000 200000000>,
<576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe_csid1: qcom,tfe_csid1@5c75000 {
cell-index = <1>;
compatible = "qcom,csid530";
reg-names = "csid", "top", "camnoc";
reg = <0x5c75000 0x5000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x75000 0x11000 0x13000>;
interrupt-names = "csid1";
interrupts = <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<240000000 240000000 0 240000000 256000000 256000000 150000000>,
<384000000 384000000 0 341333333 460800000 460800000 200000000>,
<426400000 426400000 0 384000000 576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe1: qcom,tfe1@5c75000 {
cell-index = <1>;
compatible = "qcom,tfe530";
reg-names = "tfe1";
reg = <0x5c75000 0x5000>;
reg-cam-base = <0x75000>;
interrupt-names = "tfe1";
interrupts = <0 213 0>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<256000000 256000000 150000000>,
<460800000 460800000 200000000>,
<576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe_csid2: qcom,tfe_csid2@5c7c000 {
cell-index = <2>;
compatible = "qcom,csid530";
reg-names = "csid", "top", "camnoc";
reg = <0x5c7c000 0x5000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x7c000 0x11000 0x13000>;
interrupt-names = "csid2";
interrupts = <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_2_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_2_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<240000000 240000000 0 240000000 256000000 256000000 150000000>,
<384000000 384000000 0 341333333 460800000 460800000 200000000>,
<426400000 426400000 0 384000000 576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe2: qcom,tfe2@5c7c000 {
cell-index = <2>;
compatible = "qcom,tfe530";
reg-names = "tfe2";
reg = <0x5c7c000 0x5000>;
reg-cam-base = <0x7c000>;
interrupt-names = "tfe2";
interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_2_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<256000000 256000000 150000000>,
<460800000 460800000 200000000>,
<576000000 576000000 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe_tpg0: qcom,tpg0@5c66000 {
cell-index = <0>;
compatible = "qcom,tpgv1";
reg-names = "tpg0", "top";
reg = <0x5c66000 0x400>,
<0x5c11000 0x1000>;
reg-cam-base = <0x66000 0x11000>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"cphy_rx_clk_src",
"tfe_0_cphy_rx_clk";
clocks =
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>;
clock-rates =
<240000000 240000000>,
<341333333 341333333>,
<384000000 384000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "cphy_rx_clk_src";
clock-control-debugfs = "false";
status = "ok";
};
cam_tfe_tpg1: qcom,tpg0@5c68000 {
cell-index = <1>;
compatible = "qcom,tpgv1";
reg-names = "tpg0", "top";
reg = <0x5c68000 0x400>,
<0x5c11000 0x1000>;
reg-cam-base = <0x68000 0x11000>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"cphy_rx_clk_src",
"tfe_1_cphy_rx_clk";
clocks =
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>;
clock-rates =
<240000000 240000000>,
<341333333 341333333>,
<384000000 384000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "cphy_rx_clk_src";
clock-control-debugfs = "false";
status = "ok";
};
qcom,cam-ope {
compatible = "qcom,cam-ope";
compat-hw-name = "qcom,ope";
num-ope = <1>;
status = "ok";
};
ope: qcom,ope@0x5c42000 {
cell-index = <0>;
compatible = "qcom,ope";
reg =
<0x5c42000 0x400>,
<0x5c42400 0x200>,
<0x5c42600 0x200>,
<0x5c42800 0x4400>,
<0x5c46c00 0x190>,
<0x5c46d90 0x1270>;
reg-names =
"ope_cdm",
"ope_top",
"ope_qos",
"ope_pp",
"ope_bus_rd",
"ope_bus_wr";
reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>;
interrupts = <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ope";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"ope_ahb_clk",
"ope_clk_src",
"ope_clk";
clocks =
<&gcc GCC_CAMSS_OPE_AHB_CLK>,
<&gcc GCC_CAMSS_OPE_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_CLK>;
clock-rates =
<171428571 200000000 200000000>,
<171428571 266600000 266600000>,
<240000000 465000000 465000000>,
<240000000 580000000 580000000>;
clock-cntl-level = "svs", "svs_l1", "nominal", "turbo";
src-clock-name = "ope_clk_src";
status = "ok";
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-cam-cci.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM CCI
CCI (Camera Control Interface) is module that is use for camera sensor module
I2C communication.
=======================
Required Node Structure
=======================
The camera CCI node must be described in two levels of device nodes. The
first level describe the overall CCI node structure. Second level nodes
describe camera sensor submodule nodes which is using CCI for
i2c communication.
======================================
First Level Node - CCI device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cci".
- cell-index: cci hardware core index
Usage: required
Value type: <u32>
Definition: Should specify the Hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: offset and length of the register set
for the device for the cci operating in
compatible mode.
- reg-names
Usage: required
Value type: <string>
Definition: Should specify relevant names to each
reg property defined.
- interrupts
Usage: required
Value type: <u32>
Definition: Interrupt associated with CCI HW.
- interrupt-names
Usage: required
Value type: <string>
Definition: Name of the interrupt.
- gpios
Usage: required
Value type: <phandle>
Definition: should specify the gpios to be used for the CCI.
- gpio-req-tbl-num
Usage: required
Value type: <u32>
Definition: should specify the gpio table index.
- gpio-req-tbl-flags
Usage: required
Value type: <u32>
Definition: should specify the gpio functions.
- gpio-req-tbl-label
Usage: required
Value type: <string>
Definition: should specify the gpio labels in
gpio-req-tbl-num property (in the same order)
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CCI HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clock rates in Hz for CCI HW.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: All different clock level node can support.
- clocks
Usage: required
Value type: <phandle>
Definition: all clock phandle and source clocks.
- src-clock-name
Usage: required
Value type: <string>
Definition: name for the source clock.
- regulator-names
Usage: required
Value type: <string>
Definition: name of the voltage regulators required for the device.
- gdscr-supply
Usage: required
Value type: <phandle>
Definition: should contain gdsr regulator used for cci clocks.
- mmagic-supply
Usage: optional
Value type: <phandle>
Definition: should contain mmagic regulator used for mmagic clocks.
=========================
CCI clock settings
=========================
- I2c speed settings (*)
Usage: required
Definition: List of i2c rates for CCI HW.
- i2c_freq_100Khz
Definition: qcom,i2c_standard_mode - node should contain clock settings for
100Khz
- i2c_freq_400Khz
Definition: qcom,i2c_fast_mode - node should contain clock settings for
400Khz
- i2c_freq_custom
Definition: qcom,i2c_custom_mode - node can contain clock settings for
frequencies other than 100Khz and 400Khz which is specific to usecase.
Currently it has settings for 375Khz.
- i2c_freq_1Mhz
Definition: qcom,i2c_fast_plus_mode - node should contain clock
settings for 1Mhz
* if speed settings is not defined the low level driver can use "i2c_freq_custom"
like default
- hw-thigh
Definition: should contain high period of the SCL clock in terms of CCI clock cycle
- hw-tlow
Definition: should contain high period of the SCL clock in terms of CCI clock cycle
- hw-tsu-sto
Definition: should contain setup time for STOP condition
- hw-tsu-sta
Definition: should contain setup time for Repeated START condition
- hw-thd-dat
Definition: should contain hold time for the data
- hw-thd-sta
Definition: should contain hold time for START condition
- hw-tbuf
Definition: should contain free time between a STOP and a START condition
- hw-scl-stretch-en
Definition: should contain enable or disable clock stretching
- hw-trdhld
Definition: should contain internal hold time for SDA
- hw-tsp
Definition: should contain filtering of glitches
Example:
qcom,cci@0xfda0c000 {
cell-index = <0>;
compatible = "qcom,cci";
reg = <0xfda0c000 0x300>;
reg-names = "cci";
interrupts = <0 50 0>;
interrupt-names = "cci";
clock-names = "camnoc_axi_clk", "soc_ahb_clk",
"slow_ahb_src_clk", "cpas_ahb_clk",
"cci_clk", "cci_clk_src";
clock-rates = <0 0 80000000 0 0 37500000>;
clock-cntl-level = "turbo";
gpios = <&tlmm 17 0>,
<&tlmm 18 0>,
<&tlmm 19 0>,
<&tlmm 20 0>;
gpio-tbl-num = <0 1 2 3>;
gpio-tbl-flags = <1 1 1 1>;
gpio-tbl-label = "CCI_I2C_DATA0",
"CCI_I2C_CLK0",
"CCI_I2C_DATA1",
"CCI_I2C_CLK1";
i2c_freq_100Khz: qcom,i2c_standard_mode {
hw-thigh = <78>;
hw-tlow = <114>;
hw-tsu-sto = <28>;
hw-tsu-sta = <28>;
hw-thd-dat = <10>;
hw-thd-sta = <77>;
hw-tbuf = <118>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <1>;
status = "ok";
};
i2c_freq_400Khz: qcom,i2c_fast_mode {
hw-thigh = <20>;
hw-tlow = <28>;
hw-tsu-sto = <21>;
hw-tsu-sta = <21>;
hw-thd-dat = <13>;
hw-thd-sta = <18>;
hw-tbuf = <25>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <3>;
status = "ok";
};
i2c_freq_custom: qcom,i2c_custom_mode {
hw-thigh = <15>;
hw-tlow = <28>;
hw-tsu-sto = <21>;
hw-tsu-sta = <21>;
hw-thd-dat = <13>;
hw-thd-sta = <18>;
hw-tbuf = <25>;
hw-scl-stretch-en = <1>;
hw-trdhld = <6>;
hw-tsp = <3>;
status = "ok";
};
i2c_freq_1Mhz: qcom,i2c_fast_plus_mode {
hw-thigh = <16>;
hw-tlow = <22>;
hw-tsu-sto = <17>;
hw-tsu-sta = <18>;
hw-thd-dat = <16>;
hw-thd-sta = <15>;
hw-tbuf = <19>;
hw-scl-stretch-en = <1>;
hw-trdhld = <3>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
};
=======================================
Second Level Node - CAM SENSOR MODULES
=======================================
=======================================
CAM SENSOR RESOURCE MANAGER
=======================================
Camera Sensor Resource manager node contains properties of shared camera
sensor resource.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-res-mgr".
- shared-gpios
Usage: optional
Value type: <u32>
Definition: should contain the gpios which are used by two or more
cameras, and these cameras may be opened together.
- pinctrl-names
Usage: optional
Value type: <string>
Definition: List of names to assign the shared pin state defined in pinctrl device node
- pinctrl-<0..n>
Usage: optional
Value type: <phandle>
Definition: Lists phandles each pointing to the pin configuration node within a pin
controller. These pin configurations are installed in the pinctrl device node.
=============================
CAMERA IMAGE SENSOR MODULE
=============================
Image sensor node contains properties of camera image sensor
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-sensor".
- cell-index: cci hardware core index
Usage: required
Value type: <u32>
Definition: Should specify the Hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: offset and length of the register set
for the device for the cci operating in
compatible mode.
- cci-device
Usage: required
Value type: <u32>
Definition: should contain i2c device id to be used for this camera
sensor
- cci-master
Usage: required
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
sensor
- 0 -> MASTER 0
- 1 -> MASTER 1
- csiphy-sd-index
Usage: required
Value type: <u32>
Definition: should contain csiphy instance that will used to
receive sensor data (0, 1, 2, 3).
- cam_vdig-supply
Usage: required
Value type: <phandle>
Definition: should contain regulator from which digital voltage is
supplied
- cam_vana-supply
Usage: required
Value type: <phandle>
Definition: should contain regulator from which analog voltage is
supplied
- cam_vio-supply
Usage: required
Value type: <phandle>
Definition: should contain regulator from which IO voltage is supplied
- cam_bob-supply
Usage: optional
Value type: <phandle>
Definition: should contain regulator from which BoB voltage is supplied
- regulator-names
Usage: required
Value type: <string>
Definition: should contain names of all regulators needed by this
sensor
- rgltr-cntrl-support
Usage: required
Value type: <boolean>
Definition: This property is required if the sw control regulator parameters
e.g. rgltr-min-voltage
- rgltr-min-voltage
Usage: required
Value type: <u32>
Definition: should contain minimum voltage level for regulators mentioned
in regulator-names property (in the same order)
- rgltr-max-voltage
Usage: required
Value type: <u32>
Definition: should contain maximum voltage level for regulators mentioned
in regulator-names property (in the same order)
- rgltr-load-current
Usage: required
Value type: <u32>
Definition: should contain optimum voltage level for regulators mentioned
in regulator-names property (in the same order)
- sensor-position-roll
Usage: required
Value type: <u32>
Definition: should contain sensor rotational angle with respect to axis of
reference. i.e. 0, 90, 180, 360
- sensor-position-pitch
Usage: required
Value type: <u32>
Definition: should contain sensor rotational angle with respect to axis of
reference. i.e. 0, 90, 180, 360
- sensor-position-yaw
Usage: required
Value type: <u32>
Definition: should contain sensor rotational angle with respect to axis of
reference. i.e. 0, 90, 180, 360
- qcom,secure
Usage: optional
Value type: <u32>
Definition: should be enabled to operate the camera in secure mode
- gpio-no-mux
Usage: optional
Value type: <u32>
Definition: should contain field to indicate whether gpio mux table is
available. i.e. 1 if gpio mux is not available, 0 otherwise
- cam_vaf-supply
Usage: optional
Value type: <u32>
Definition: should contain regulator from which AF voltage is supplied
- pwm-switch
Usage: optional
Value type: <boolean>
Definition: This property is required for regulator to switch into PWM mode.
- gpios
Usage: required
Value type: <phandle>
Definition: should contain phandle to gpio controller node and array of
#gpio-cells specifying specific gpio (controller specific)
- gpio-reset
Usage: required
Value type: <u32>
Definition: should contain index to gpio used by sensors reset_n
- gpio-standby
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors standby_n
- gpio-vio
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors io vreg enable
- gpio-vana
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors analog vreg enable
- gpio-vdig
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors digital vreg enable
- gpio-vaf
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors af vreg enable
- gpio-af-pwdm
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by sensors af pwdm_n
- gpio-req-tbl-num
Usage: optional
Value type: <u32>
Definition: should contain index to gpios specific to this sensor
- gpio-req-tbl-flags
Usage: optional
Value type: <u32>
Definition: should contain direction of gpios present in
gpio-req-tbl-num property (in the same order)
- gpio-req-tbl-label
Usage: optional
Value type: <u32>
Definition: should contain name of gpios present in
gpio-req-tbl-num property (in the same order)
- gpio-set-tbl-num
Usage: optional
Value type: <u32>
Definition: should contain index of gpios that need to be
configured by msm
- gpio-set-tbl-flags
Usage: optional
Value type: <u32>
Definition: should contain value to be configured for the gpios
present in gpio-set-tbl-num property (in the same order)
- gpio-set-tbl-delay
Usage: optional
Value type: <u32>
Definition: should contain amount of delay after configuring
gpios as specified in gpio_set_tbl_flags property (in the same order)
- actuator-src
Usage: optional
Value type: <phandle>
Definition: if auto focus is supported by this sensor, this
property should contain phandle of respective actuator node
- led-flash-src
Usage: optional
Value type: <phandle>
Definition: if LED flash is supported by this sensor, this
property should contain phandle of respective LED flash node
- qcom,vdd-cx-supply
Usage: optional
Value type: <phandle>
Definition: should contain regulator from which cx voltage is supplied
- qcom,vdd-cx-name
Usage: optional
Value type: <string>
Definition: should contain names of cx regulator
- eeprom-src
Usage: optional
Value type: <phandle>
Definition: if eeprom memory is supported by this sensor, this
property should contain phandle of respective eeprom nodes
- ois-src
Usage: optional
Value type: <phandle>
Definition: if optical image stabilization is supported by this sensor,
this property should contain phandle of respective ois node
- ir-led-src
Usage: optional
Value type: <phandle>
Definition: if ir led is supported by this sensor, this property
should contain phandle of respective ir-led node
- qcom,ir-cut-src
Usage: optional
Value type: <phandle>
Definition: if ir cut is supported by this sensor, this property
should contain phandle of respective ir-cut node
- qcom,special-support-sensors
Usage: required
Value type: <string>
Definition: if only some special sensors are supported
on this board, add sensor name in this property.
- use-shared-clk
Usage: optional
Value type: <boolean>
Definition: It is booloean property. This property is required
if the clk is shared clk between different sensor and ois, if this
device need to be opened together.
- clock-rates
Usage: required
Value type: <u32>
Definition: clock rate in Hz.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: All different clock level node can support.
- clock-cntl-support
Usage: optional
Value type: <boolean>
Definition: Says whether clock control support is present or not
- clocks
Usage: required
Value type: <phandle>
Definition: all clock phandle and source clocks.
- clock-control
Usage: optional
Value type: <string>
Definition: The valid fields are "NO_SET_RATE", "INIT_RATE" and
"SET_RATE". "NO_SET_RATE" the corresponding clock is enabled without setting
the rate assuming some other driver has already set it to appropriate rate.
"INIT_RATE" clock rate is not queried assuming some other driver has set
the clock rate and ispif will set the the clock to this rate.
"SET_RATE" clock is enabled and the rate is set to the value specified
in the property clock-rates.
=============================
ACTUATOR MODULE
=============================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,actuator".
- cell-index: cci hardware core index
Usage: required
Value type: <u32>
Definition: Should specify the Hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: offset and length of the register set
for the device for the cci operating in
compatible mode.
- cci-device
Usage: required
Value type: <u32>
Definition: should contain i2c device id to be used for this camera
sensor
- cci-master
Usage: required
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
sensor
- 0 -> MASTER 0
- 1 -> MASTER 1
- cam_vaf-supply
Usage: required
Value type: <phandle>
Definition: should contain regulator from which AF voltage is supplied
- regulator-names
Usage: required
Value type: <string>
Definition: should contain names of all regulators needed by this
actuator. i.e. "cam_vaf"
- rgltr-cntrl-support
Usage: optional
Value type: <boolean>
Definition: It is booloean property. This property is required
if the code and regulator control parameters e.g. rgltr-min-voltage
- rgltr-min-voltage
Usage: optional
Value type: <u32>
Definition: should contain minimum voltage level in mcrovolts
for regulators mentioned in regulator-names property (in the same order)
- rgltr-max-voltage
Usage: optional
Value type: <u32>
Definition: should contain maximum voltage level in mcrovolts
for regulators mentioned in regulator-names property (in the same order)
- rgltr-load-current
Usage: optional
Value type: <u32>
Definition: should contain the maximum current in microamps
required from the regulators mentioned in the regulator-names property
(in the same order).
=============================
OIS MODULE
=============================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,ois".
- cell-index: cci hardware core index
Usage: required
Value type: <u32>
Definition: Should specify the Hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: offset and length of the register set
for the device for the cci operating in
compatible mode.
- cci-device
Usage: required
Value type: <u32>
Definition: should contain i2c device id to be used for this camera
sensor
- cci-master
Usage: required
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
sensor
- 0 -> MASTER 0
- 1 -> MASTER 1
- cam_vaf-supply
Usage: required
Value type: <phandle>
Definition: should contain regulator from which AF voltage is supplied
- regulator-names
Usage: required
Value type: <string>
Definition: should contain names of all regulators needed by this
actuator. i.e. "cam_vaf"
- rgltr-cntrl-support
Usage: optional
Value type: <boolean>
Definition: It is booloean property. This property is required
if the code and regulator control parameters e.g. rgltr-min-voltage
- rgltr-min-voltage
Usage: optional
Value type: <u32>
Definition: should contain minimum voltage level in mcrovolts
for regulators mentioned in regulator-names property (in the same order)
- rgltr-max-voltage
Usage: optional
Value type: <u32>
Definition: should contain maximum voltage level in mcrovolts
for regulators mentioned in regulator-names property (in the same order)
- rgltr-load-current
Usage: optional
Value type: <u32>
Definition: should contain the maximum current in microamps
required from the regulators mentioned in the regulator-names property
(in the same order).
- use-shared-clk
Usage: optional
Value type: <boolean>
Definition: This property is required if the clk is shared clk between different
sensor and ois, if this device need to be opened together.
Example:
&soc {
led_flash0: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pmi8994_flash0 &pmi8994_flash1>;
torch-source = <&pmi8998_torch0 &pmi8998_torch1>;
switch-source = <&pmi8998_switch>;
status = "ok";
};
};
&cam_cci0 {
actuator0: qcom,actuator@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,actuator";
cci-device = <0>;
cci-master = <0>;
cam_vaf-supply = <&pmi8998_bob>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
};
ois0: qcom,ois@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,ois";
cci-device = <0>;
cci-master = <0>;
cam_vaf-supply = <&pmi8998_bob>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
shared-gpios = <18 19>;
pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend";
pinctrl-0 = <&cam_shared_clk_active &cam_res_mgr_active>;
pinctrl-1 = <&cam_shared_clk_suspend &cam_res_mgr_suspend>;
};
qcom,cam-sensor@0 {
cell-index = <0>;
compatible = "qcom,camera";
reg = <0x0>;
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
secure = <1>;
led-flash-src = <&led_flash0>;
actuator-src = <&actuator0>;
ois-src = <&ois0>;
eeprom-src = <&eeprom0>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009l_l1>;
cam_vana-supply = <&pm8009l_l5>;
cam_bob-supply = <&pm8150l_bob>;
cam_clk-supply = <&tital_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <0 2800000 1200000 0 3008000>;
rgltr-max-voltage = <0 2800000 1200000 0 4000000>;
rgltr-load-current = <0 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 80 0>,
<&tlmm 79 0>;
gpio-reset = <1>;
gpio-standby = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VANA";
sensor-position = <0>;
sensor-mode = <0>;
cci-device = <0>;
cci-master = <0>;
status = "ok";
use-shared-clk;
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
clock-cntl-leveli = "turbo";
clock-rates = <24000000>;
};
};

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* Qualcomm Technologies, Inc. MSM Camera CDM
CDM (Camera Data Mover) is module intended to provide means for fast programming
camera registers and lookup tables.
=======================
Required Node Structure
=======================
CDM Interface node takes care of the handling has HW nodes and provide interface
for camera clients.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-cdm-intf".
- label
Usage: required
Value type: <string>
Definition: Should be "cam-cdm-intf".
- num-hw-cdm
Usage: required
Value type: <u32>
Definition: Number of supported HW blocks.
- cdm-client-names
Usage: required
Value type: <string>
Definition: List of Clients supported by CDM interface.
Example:
qcom,cam-cdm-intf {
compatible = "qcom,cam-cdm-intf";
label = "cam-cdm-intf";
num-hw-cdm = <1>;
cdm-client-names = "vfe",
"jpeg-dma",
"jpeg",
"fd";
};
=======================
Required Node Structure
=======================
CDM HW node provides interface for camera clients through
to CDM interface node.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam170-cpas-cdm0", "qcom,cam480-cpas-cdm0",
"qcom,cam480-cpas-cdm1", "qcom,cam480-cpas-cdm2", "qcom,cam-cpas-cdm1_0",
"qcom,cam-cpas-cdm1_1", "qcom,cam-cpas-cdm1_2", "qcom,cam-ife-cdm1_2",
"qcom,cam-cpas-cdm2_0" or "qcom,cam-ope-cdm2_0"
- label
Usage: required
Value type: <string>
Definition: Should be "cpas-cdm".
- reg-names
Usage: required
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: required
Value type: <u32>
Definition: Offset of the register space compared to
to Camera base register space.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt associated with CDM HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for CDM HW.
- camss-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CDM HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for CDM HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- cdm-client-names
Usage: required
Value type: <string>
Definition: List of Clients supported by CDM HW node.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
Example:
qcom,cpas-cdm0@ac48000 {
cell-index = <0>;
compatible = "qcom,cam170-cpas-cdm0";
label = "cpas-cdm0";
reg = <0xac48000 0x1000>;
reg-names = "cpas-cdm";
interrupts = <0 461 0>;
interrupt-names = "cpas-cdm";
regulator-names = "camss";
camss-supply = <&titan_top_gdsc>;
clock-names = "soc_ahb_clk",
"titan_top_ahb_clk",
"cam_axi_clk",
"camcc_slow_ahb_clk_src",
"cpas_top_ahb_clk",
"camnoc_axi_clk";
clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;
qcom,clock-rates = <0 80000000 80000000 80000000 80000000 80000000>;
cdm-client-names = "ife";
clock-cntl-level = "turbo";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera CPAS
The MSM camera CPAS device provides dependency definitions for
enabling Camera CPAS HW and provides the Client definitions
for all HW blocks that use CPAS driver for BW voting. These
definitions consist of various properties that define the list
of clients supported, AHB, AXI master-slave IDs used for BW
voting.
=======================
Required Node Structure
=======================
The camera CPAS device must be described in five levels. The first level has
general description of cpas including compatibility, interrupts, power info
etc.
The second level deals with information related to CPAS clients and how
the BW should be calculated. For simplicity in BW vote consolidation, the
grouping of granular votes pertaining to CPAS clients is represented as nodes
at four CAMNOC levels. The nodes at a particular level have some common
properties such as traffic merge type which indicates whether the votes at a
node have to be summed up, sum divided by two or taken max of all. CAMNOC Level
zero node usually represents granular vote info for clients. CAMNOC Level one
represents nodes which are clubbed together by arbiter in CAMNOC diagram. CAMNOC
Level two represents consolidated read and write nodes for RT and NRT paths.
CAMNOC Level three provides axi port information and these have nodes where all
paths from clients eventually converge according to their properties. This
includes master-slave IDs, ab, ib values for mnoc, camnoc bus interface
==================================
First Level Node - CAM CPAS device
==================================
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-cpas".
- label
Usage: required
Value type: <string>
Definition: Should be "cpas".
- arch-compat
Usage: required
Value type: <string>
Definition: Should be "cpas_top" or "camss_top".
- reg-names
Usage: required
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: required
Value type: <u32>
Definition: Offset of the register space compared to
to Camera base register space.
- cam_hw_fuse
Usage: optional
Value type: <u32>
Definition: List of fuse based features and respective
fuse info.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt associated with CAMNOC HW.
- qcom,cpas-hw-ver
Usage: required
Value type: <u32>
Definition: CAM HW Version information.
- camnoc-axi-min-ib-bw
Usage: optional
Value type: <u64>
Definition: Min camnoc axi bw for the given target.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for CPAS HW.
- camss-vdd-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CPAS HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for CPAS HW.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
- control-camnoc-axi-clk
Usage: optional
Value type: <empty>
Definition: Bool property specifying whether to control camnoc axi
clock from cpas driver.
- camnoc-bus-width
Usage: required if control-camnoc-axi-clk is enabled
Value type: <u32>
Definition: camnoc bus width.
- camnoc-axi-clk-bw-margin-perc
Usage: optional
Value type: <u32>
Definition: Percentage value to be added to camnoc bw while calculating
camnoc axi clock frequency.
- qcom,msm-bus,name
- qcom,msm-bus,num-cases
- qcom,msm-bus,num-paths
- qcom,msm-bus,vectors-KBps
Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt
for the properties above.
- vdd-corners
Usage: required
Value type: <u32>
Definition: List of vdd corners to map for ahb level.
- vdd-corner-ahb-mapping
Usage: required
Value type: <string>
Definition: List of ahb level strings corresponds to vdd-corners.
Supported strings: suspend, svs, nominal, turbo
- client-id-based
Usage: required
Value type: <empty>
Definition: Bool property specifying whether CPAS clients are ID based.
- client-names
Usage: required
Value type: <string>
Definition: List of Clients supported by CPAS.
- client-bus-camnoc-based
Usage: optional
Value type: <empty>
Definition: Bool property specifying whether Clients are connected
through CAMNOC for AXI access.
===================================================================
Third Level Node - CAMNOC Level nodes
===================================================================
- level-index
Usage: required
Value type: <u32>
Definition: Number representing level index for ndoes at current CAMNOC level
- camnoc-max-needed
Usage: optional
Value type: <empty>
Definition: Bool property for all votes at current level to be taken maximum
for CAMNOC BW calculation.
===================================================================
Fourth Level Node - Generic CAMNOC node properties
===================================================================
- cell-index
Usage: required
Value type: <u32>
Definition: Unique index of node to be used by CPAS driver.
- node-name
Usage: required
Value type: <string>
Definition: Unique name representing this node.
- path-data-type
Usage: required if a CAMNOC Level 0 Node
Value type: <u32>
Definition: Type of path data for a specific client.
Supported : CAM_CPAS_PATH_DATA_IFE_LINEAR, CAM_CPAS_PATH_DATA_ALL, etc.
Please refer dt-bindings/msm/msm-camera.h for all supported
definitions.
- path-transaction-type
Usage: required if a CAMNOC Level 0 Node
Value type: <u32>
Definition: Type of path transaction for a specific client.
Supported : CAM_CPAS_TRANSACTION_READ, CAM_CPAS_TRANSACTION_WRITE
- client-name
Usage: required if a CAMNOC Level 0 Node
Value type: <string>
Definition: Name of the client with above properties.
Supported : From "client-names" property in CPAS node
- constituent-paths
Usage: optional, applicable only to CAMNOC Level 0 Nodes
Value type: <u32>
Definition: List of constituents of path data type of current node.
Supported : CAM_CPAS_PATH_DATA_IFE_VID, CAM_CPAS_PATH_DATA_IFE_DISP, etc.
Please refer dt-bindings/msm/msm-camera.h for all supported
definitions.
- traffic-merge-type
Usage: required if NOT a CAMNOC Level 0 Node
Value type: <u32>
Definition: Type of traffic merge for that node.
Supported : CAM_CPAS_TRAFFIC_MERGE_SUM, CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE.
- parent-node
Usage: required for all except CAMNOC Level 3 Nodes
Value type: <phandle>
Definition: Parent node of this node. Parent node must be at least
one level above the current level.
- bus-width-factor
Usage: optional
Value type: <u32>
Definition: For bus width factor consideration in CAMNOC BW calculation
- qcom,axi-port-name
Usage: required at CAMNOC Level 3
Value type: <string>
Definition: Name of the AXI Port.
- ib-bw-voting-needed
Usage: optional
Value type: <empty>
Definition: Bool property indicating axi port requires instantaneous bandwidth
===================================================================
Fifth Level Node - CAM AXI Bus Properties
===================================================================
- qcom,msm-bus,name
- qcom,msm-bus,num-cases
- qcom,msm-bus,num-paths
- qcom,msm-bus,vectors-KBps
Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt
for the properties above.
- qcom,msm-bus-vector-dyn-vote
Usage: optional
Value type: <empty>
Definition: Bool property specifying whether this bus client
is dynamic vote based.
Example:
qcom,cam-cpas@ac40000 {
cell-index = <0>;
compatible = "qcom,cam-cpas";
label = "cpas";
arch-compat = "cpas_top";
status = "ok";
reg-names = "cam_cpas_top", "cam_camnoc";
reg = <0xac40000 0x1000>,
<0xac42000 0x5000>;
reg-cam-base = <0x40000 0x42000>;
cam_hw_fuse = <CAM_CPAS_QCFA_BINNING_ENABLE 0x00780210 29>,
<CAM_CPAS_SECURE_CAMERA_ENABLE 0x00780210 18>;
interrupt-names = "cpas_camnoc";
interrupts = <0 459 0>;
qcom,cpas-hw-ver = <0x170100>; /* Titan v170 v1.0.0 */
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "gcc_ahb_clk",
"gcc_axi_clk",
"soc_ahb_clk",
"cpas_ahb_clk",
"slow_ahb_clk_src",
"camnoc_axi_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;
src-clock-name = "slow_ahb_clk_src";
clock-rates = <0 0 0 0 80000000 0>;
clock-cntl-level = "turbo";
control-camnoc-axi-clk;
camnoc-bus-width = <32>;
camnoc-axi-clk-bw-margin-perc = <10>;
qcom,msm-bus,name = "cam_ahb";
qcom,msm-bus,num-cases = <4>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 640000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 640000>;
client-id-based;
client-names =
"csiphy0", "csiphy1", "csiphy2", "csiphy3",
"csiphy4", "csiphy5", "cci0", "cci1",
"csid0", "csid1", "csid2", "csid3",
"csid4", "csid5", "csid6",
"ife0", "ife1", "ife2", "ife3", "custom0",
"ipe0", "cam-cdm-intf0", "cpas-cdm0", "cpas-cdm1",
"cpas-cdm2",
"bps0", "icp0", "jpeg-dma0", "jpeg-enc0",
"fd0";
camera-bus-nodes {
level3-nodes {
level-index = <3>;
level3_rt0_rd_wr_sum: level3-rt0-rd-wr-sum {
cell-index = <0>;
node-name = "level3-rt0-rd-wr-sum";
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
qcom,axi-port-name = "cam_hf_0";
ib-bw-voting-needed;
qcom,axi-port-mnoc {
qcom,msm-bus,name =
"cam_hf_0_mnoc";
qcom,msm-bus-vector-dyn-vote;
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>;
};
};
};
level2-nodes {
level-index = <2>;
camnoc-max-needed;
level2_rt0_wr: level2-rt0-wr {
cell-index = <3>;
node-name = "level2-rt0-wr";
parent-node = <&level3_rt0_rd_wr_sum>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE>;
};
};
level1-nodes {
level-index = <1>;
camnoc-max-needed;
level1_rt0_wr0: level1-rt0-wr0 {
cell-index = <8>;
node-name = "level1-rt0-wr0";
parent-node = <&level2_rt0_wr>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
};
};
level0-nodes {
level-index = <0>;
ife0_ubwc_stats_wr: ife0-ubwc-stats-wr {
cell-index = <16>;
node-name = "ife0-ubwc-stats-wr";
client-name = "ife0";
traffic-data =
<CAM_CPAS_PATH_DATA_IFE_UBWC_STATS>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr0>;
};
};
};
};

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* Qualcomm Technologies, Inc. MSM CSI Phy
=======================
Required Node Structure
=======================
The camera CSIPHY node must be described in First level of device nodes. The
first level describe the overall CSIPHY node structure.
======================================
First Level Node - CSIPHY device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,csiphy-v1.0",
"qcom,csiphy-v1.1", "qcom,csiphy-v1.2", "qcom,csiphy-v1.2.1",
"qcom,csiphy-v1.2.2", "qcom,csiphy-v2.0", "qcom,csiphy-v1.2.2.2",
"qcom,csiphy-v1.2.3", "qcom,csiphy".
- cell-index: csiphy hardware core index
Usage: required
Value type: <u32>
Definition: Should specify the Hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: offset and length of the register set
for the device for the csiphy operating in
compatible mode.
- reg-names
Usage: required
Value type: <string>
Definition: Should specify relevant names to each
reg property defined.
- reg-cam-base
Usage: required
Value type: <string>
Definition: offset of CSIPHY in camera hw block
- interrupts
Usage: required
Value type: <u32>
Definition: Interrupt associated with CCI HW.
- interrupt-names
Usage: required
Value type: <string>
Definition: Name of the interrupt.
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CSIPHY HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clock rates in Hz for CSIPHY HW.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: All different clock level node can support.
- clocks
Usage: required
Value type: <phandle>
Definition: all clock phandle and source clocks.
- regulator-names
Usage: required
Value type: <string>
Definition: name of the voltage regulators required for the device.
- gdscr-supply
Usage: required
Value type: <phandle>
Definition: should contain gdsr regulator used for CSIPHY clocks.
- mipi-csi-vdd-supply
Usage: required
Value type: <phandle>
Definition: should contain phandle for mipi-csi-vdd regulator used for
CSIPHY device.
- csi-vdd-voltage
Usage: required
Value type: <u32>
Definition: should contain required voltage for csi-vdd supply for CSIPHY.
Example:
qcom,csiphy@ac65000 {
cell-index = <0>;
compatible = "qcom,csiphy-v1.0", "qcom,csiphy";
reg = <0xac65000 0x200>;
reg-cam-base = <0x65000>;
reg-names = "csiphy";
interrupts = <0 477 0>;
interrupt-names = "csiphy";
regulator-names = "gdscr", "refgen";
mipi-csi-vdd-supply = <&pm8998_l1>;
csi-vdd-voltage = <1200000>;
gdscr-supply = <&titan_top_gdsc>;
clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&clock_camcc CAM_CC_CSIPHY0_CLK>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src", "csiphy0_clk",
"csi0phytimer_clk_src", "csi0phytimer_clk";
clock-rates = <400000000 0 300000000 0>;
clock-cntl-level = "turbo";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera Custom HW
Camera Custom device provides the definitions for enabling
the custom hardware. It also provides the functions for the client
to control the Custom hardware.
=======================
Required Node Structure
=======================
The Custom device is described in one level of the device node.
======================================
First Level Node - CAM Custom device
======================================
Required properties:
- compatible
Usage: required
Value type: <string>
Definition: Should specify the compatibility string for matching the
driver. e.g. "qcom,cam_custom_hw_sub_mod".
Example:
qcom,cam-custom-hw {
compatible = "qcom,cam_custom_hw_sub_mod";
arch-compat = "custom";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera Custom
The MSM camera Custom driver provides the definitions for enabling
the Camera custom hadware. It provides the functions for the Client to
control the custom hardware.
=======================
Required Node Structure
=======================
The camera Custom device is described in one level of device node.
==================================
First Level Node - CAM CUSTOM device
==================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-custom".
- arch-compat
Usage: required
Value type: <string>
Definition: Should be "custom".
Example:
qcom,cam-custom {
compatible = "qcom,cam-custom";
arch-compat = "custom";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM EEPROM
EEPROM is a one time programmed(OTP) device that stores the calibration data
use for camera sensor. It may either be integrated in the sensor module or in
the sensor itself. As a result, the power, clock and GPIOs may be the same as
the camera sensor. The following describes the page block map, power supply,
clock, GPIO and power on sequence properties of the EEPROM device.
=======================================================
Required Node Structure if probe happens from userspace
=======================================================
The EEPROM device is described in one level of the device node.
======================================
First Level Node - CAM EEPROM device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,eeprom".
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for EEPROM HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- rgltr-cntrl-support
Usage: required
Value type: <bool>
Definition: This property specifies if the regulator control is supported
e.g. rgltr-min-voltage.
- rgltr-min-voltage
Usage: required
Value type: <u32>
Definition: should contain minimum voltage level for regulators
mentioned in regulator-names property.
- rgltr-max-voltage
Usage: required
Value type: <u32>
Definition: should contain maximum voltage level for regulators
mentioned in regulator-names property.
- rgltr-load-current
Usage: required
Value type: <u32>
Definition: should contain the maximum current in microamps required for
the regulators mentioned in regulator-names property.
- gpio-no-mux
Usage: required
Value type: <u32>
Definition: should specify the gpio mux type.
- gpios
Usage: required
Value type: <phandle>
Definition: should specify the gpios to be used for the eeprom.
- gpio-reset
Usage: required
Value type: <u32>
Definition: should specify the reset gpio index.
- gpio-standby
Usage: required
Value type: <u32>
Definition: should specify the standby gpio index.
- gpio-req-tbl-num
Usage: required
Value type: <u32>
Definition: should specify the gpio table index.
- gpio-req-tbl-flags
Usage: required
Value type: <u32>
Definition: should specify the gpio functions.
- gpio-req-tbl-label
Usage: required
Value type: <string>
Definition: should specify the gpio labels.
- sensor-position
Usage: required
Value type: <u32>
Definition: should contain the mount angle of the camera sensor.
- cci-device
Usage: required
Value type: <u32>
Definition: should contain i2c device id to be used for this camera
sensor
- cci-master
Usage: required
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
sensor.
- sensor-mode
Usage: required
Value type: <u32>
Definition: should contain sensor mode supported.
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for EEPROM HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for EEPROM HW.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: says what all different clock levels eeprom node has.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
Example:
eeprom0: qcom,eeprom@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8998_l5>;
cam_vio-supply = <&pm8998_lvs1>;
regulator-names = "cam_vdig", "cam_vio";
rgltr-cntrl-support;
rgltr-min-voltage = <1200000 0>;
rgltr-max-voltage = <1200000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 37 0>,
<&msmgpio 36 0>;
gpio-reset = <1>;
gpio-standby = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET1",
"CAM_STANDBY";
sensor-position = <0>;
sensor-mode = <0>;
cci-device = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
=======================================================
Required Node Structure if probe happens from kernel
=======================================================
The EEPROM device is described in one level of the device node.
======================================
First Level Node - CAM EEPROM device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,eeprom".
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- qcom,eeprom-name
Usage: required
Value type: <string>
Definition: Name of the EEPROM HW.
- qcom,slave-addr
Usage: required
Value type: <u32>
Definition: Slave address of the EEPROM HW.
- qcom,num-blocks
Usage: required
Value type: <u32>
Definition: Total block number that eeprom contains.
- qcom,pageX
Usage: required
Value type: <u32>
Definition: List of values specifying page size, start address,
address type, data, data type, delay in ms.
size 0 stand for non-paged.
- qcom,pollX
Usage: required
Value type: <u32>
Definition: List of values specifying poll size, poll reg address,
address type, data, data type, delay in ms.
size 0 stand for not used.
- qcom,memX
Usage: required
Value type: <u32>
Definition: List of values specifying memory size, start address,
address type, data, data type, delay in ms.
size 0 stand for not used.
- qcom,saddrX
Usage: required
Value type: <u32>
Definition: property should specify the slave address for block (%d).
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for EEPROM HW.
- qcom,cmm-data-support
Usage: required
Value type: <u32>
Definition: Camera MultiModule data capability flag..
- qcom,cmm-data-compressed
Usage: required
Value type: <u32>
Definition: Camera MultiModule data compression flag.
- qcom,cmm-data-offset
Usage: required
Value type: <u32>
Definition: Camera MultiModule data start offset.
- qcom,cmm-data-size
Usage: required
Value type: <u32>
Definition: Camera MultiModule data size.
- qcom,cam-power-seq-type
Usage: required
Value type: <string>
Definition: should specify the power on sequence types.
- qcom,cam-power-seq-val
Usage: required
Value type: <string>
Definition: should specify the power on sequence values.
- qcom,cam-power-seq-cfg-val
Usage: required
Value type: <u32>
Definition: should specify the power on sequence config values.
- qcom,cam-power-seq-delay
Usage: required
Value type: <u32>
Definition: should specify the power on sequence delay time in ms.
- spiop-read
Usage: required
Value type: <u32>
Definition: this array provides SPI read operation related data.
- spiop-readseq
Usage: required
Value type: <u32>
Definition: this array provides SPI read sequence operation realted data.
- spiop-queryid
Usage: required
Value type: <u32>
Definition: this array provides SPI query eeprom id operation related data.
- spiop-pprog:
Usage: required
Value type: <u32>
Definition: this array provides SPI page program operation related data.
- spiop-wenable
Usage: required
Value type: <u32>
Definition: this array provides SPI write enable operation related data.
- spiop-readst
Usage: required
Value type: <u32>
Definition: this array provides SPI read destination operation related data.
- spiop-erase
Usage: required
Value type: <u32>
Definition: this array provides SPI erase operation related data.
- eeprom-idx
Usage: required
Value type: <u32>
Definition: this array provides eeprom id realted data.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- rgltr-cntrl-support
Usage: required
Value type: <bool>
Definition: This property specifies if the regulator control is supported
e.g. rgltr-min-voltage.
- rgltr-min-voltage
Usage: required
Value type: <u32>
Definition: should contain minimum voltage level for regulators
mentioned in regulator-names property.
- rgltr-max-voltage
Usage: required
Value type: <u32>
Definition: should contain maximum voltage level for regulators
mentioned in regulator-names property.
- rgltr-load-current
Usage: required
Value type: <u32>
Definition: should contain the maximum current in microamps required for
the regulators mentioned in regulator-names property.
- gpio-no-mux
Usage: required
Value type: <u32>
Definition: should specify the gpio mux type.
- gpios
Usage: required
Value type: <phandle>
Definition: should specify the gpios to be used for the eeprom.
- gpio-reset
Usage: required
Value type: <u32>
Definition: should specify the reset gpio index.
- gpio-standby
Usage: required
Value type: <u32>
Definition: should specify the standby gpio index.
- gpio-req-tbl-num
Usage: required
Value type: <u32>
Definition: should specify the gpio table index.
- gpio-req-tbl-flags
Usage: required
Value type: <u32>
Definition: should specify the gpio functions.
- gpio-req-tbl-label
Usage: required
Value type: <string>
Definition: should specify the gpio labels.
- sensor-position
Usage: required
Value type: <u32>
Definition: should contain the mount angle of the camera sensor.
- cci-device
Usage: required
Value type: <u32>
Definition: should contain i2c device id to be used for this camera
sensor
- cci-master
Usage: required
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
sensor.
- sensor-mode
Usage: required
Value type: <u32>
Definition: should contain sensor mode supported.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: says what all different clock levels eeprom node has.
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for EEPROM HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for EEPROM HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
Example:
eeprom0: qcom,eeprom@0 {
cell-index = <0>;
reg = <0x0>;
qcom,eeprom-name = "msm_eeprom";
eeprom-id0 = <0xF8 0x15>;
eeprom-id1 = <0xEF 0x15>;
eeprom-id2 = <0xC2 0x36>;
eeprom-id3 = <0xC8 0x15>;
compatible = "qcom,eeprom";
qcom,slave-addr = <0x60>;
qcom,num-blocks = <2>;
qcom,page0 = <1 0x100 2 0x01 1 1>;
qcom,poll0 = <0 0x0 2 0 1 1>;
qcom,mem0 = <0 0x0 2 0 1 0>;
qcom,page1 = <1 0x0200 2 0x8 1 1>;
qcom,pageen1 = <1 0x0202 2 0x01 1 10>;
qcom,poll1 = <0 0x0 2 0 1 1>;
qcom,mem1 = <32 0x3000 2 0 1 0>;
qcom,saddr1 = <0x62>;
qcom,cmm-data-support;
qcom,cmm-data-compressed;
qcom,cmm-data-offset = <0>;
qcom,cmm-data-size = <0>;
spiop-read = <0x03 3 0 0 0>;
spiop-readseq = <0x03 3 0 0 0>;
spiop-queryid = <0x90 3 0 0 0>;
spiop-pprog = <0x02 3 0 3 100>;
spiop-wenable = <0x06 0 0 0 0>;
spiop-readst = <0x05 0 0 0 0>;
spiop-erase = <0x20 3 0 10 100>;
qcom,cam-power-seq-type = "sensor_vreg",
"sensor_vreg", "sensor_clk",
"sensor_gpio", "sensor_gpio";
qcom,cam-power-seq-val = "cam_vdig",
"cam_vio", "sensor_cam_mclk",
"sensor_gpio_reset",
"sensor_gpio_standby";
qcom,cam-power-seq-cfg-val = <1 1 24000000 1 1>;
qcom,cam-power-seq-delay = <1 1 5 5 10>;
cam_vdig-supply = <&pm8998_l5>;
cam_vio-supply = <&pm8998_lvs1>;
regulator-names = "cam_vdig", "cam_vio";
rgltr-cntrl-support;
rgltr-min-voltage = <1200000 0>;
rgltr-max-voltage = <1200000 0>;
rgltr-load-current = <0 80000 105000 0>;
qcom,gpio-no-mux = <0>;
gpios = <&msmgpio 26 0>,
<&msmgpio 37 0>,
<&msmgpio 36 0>;
gpio-reset = <1>;
gpio-standby = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK",
"CAM_RESET1",
"CAM_STANDBY";
sensor-position = <0>;
sensor-mode = <0>;
cci-device = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-cntl-level = "turbo";
clock-names = "cam_clk";
clock-rates = <24000000>;
};

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* Qualcomm Technologies, Inc. MSM Camera FD
The MSM camera Face Detection device provides dependency definitions
for enabling Camera FD HW. MSM camera FD is implemented in multiple
device nodes. The root FD device node has properties defined to hint
the driver about the FD HW nodes available during the probe sequence.
Each node has multiple properties defined for interrupts, clocks and
regulators.
=======================
Required Node Structure
=======================
FD root interface node takes care of the handling Face Detection high level
driver handling and controls underlying FD hardware present.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-fd".
- compat-hw-name
Usage: required
Value type: <string>
Definition: Should be "qcom,fd".
- num-fd
Usage: required
Value type: <u32>
Definition: Number of supported FD HW blocks.
Example:
qcom,cam-fd {
compatible = "qcom,cam-fd";
compat-hw-name = "qcom,fd";
num-fd = <1>;
};
=======================
Required Node Structure
=======================
FD Node provides interface for Face Detection hardware driver
about the device register map, interrupt map, clocks, regulators.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be one of "qcom,fd41", "qcom,fd501",
"qcom,fd600".
- reg-names
Usage: optional
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: optional
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: optional
Value type: <u32>
Definition: Offset of the register space compared to
to Camera base register space.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt line associated with FD HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for FD HW.
- camss-vdd-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for FD HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks required for FD HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
Examples:
cam_fd: qcom,fd@ac5a000 {
cell-index = <0>;
compatible = "qcom,fd600";
reg-names = "fd_core", "fd_wrapper";
reg = <0xac5a000 0x1000>,
<0xac5b000 0x400>;
reg-cam-base = <0x5a000 0x5b000>;
interrupt-names = "fd";
interrupts = <0 462 0>;
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "gcc_ahb_clk",
"gcc_axi_clk",
"soc_ahb_clk",
"cpas_ahb_clk",
"camnoc_axi_clk",
"fd_core_clk_src",
"fd_core_clk",
"fd_core_uar_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_FD_CORE_CLK_SRC>,
<&clock_camcc CAM_CC_FD_CORE_CLK>,
<&clock_camcc CAM_CC_FD_CORE_UAR_CLK>;
src-clock-name = "fd_core_clk_src";
clock-cntl-level = "svs";
clock-rates = <0 0 0 0 0 400000000 0 0>;
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-cam-icp.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM Camera ICP
The MSM camera ICP devices are implemented multiple device nodes.
The root icp device node has properties defined to hint the driver
about the number of A5,IPE and BPS nodes available during the
probe sequence. Each node has multiple properties defined
for interrupts, clocks and regulators.
=======================
Required Node Structure
=======================
ICP root interface node takes care of the handling account for number
of A5, IPE and BPS devices present on the hardware.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-icp".
- compat-hw-name
Usage: required
Value type: <string>
Definition: Should be "qcom,a5" or "qcom,ipe0" or "qcom,ipe1" or "qcom,bps".
- num-a5
Usage: required
Value type: <u32>
Definition: Number of supported A5 processors.
- num-ipe
Usage: required
Value type: <u32>
Definition: Number of supported IPE HW blocks.
- num-bps
Usage: required
Value type: <u32>
Definition: Number of supported BPS HW blocks.
Example:
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5", "qcom,ipe0", "qcom,ipe1", "qcom,bps";
num-a5 = <1>;
num-ipe = <2>;
num-bps = <1>;
status = "ok";
};
=======================
Required Node Structure
=======================
A5/IPE/BPS Node's provides interface for Image Control Processor driver
about the A5 register map, interrupt map, clocks, regulators
and name of firmware image.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-a5" or "qcom,cam-ipe" or "qcom,cam-bps".
- reg-names
Usage: optional
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: optional
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: optional
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt associated with CDM HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for CDM HW.
- camss-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CDM HW.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for CDM HW.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: lowsvs, svs, svs_l1, nominal, turbo.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- fw_name
Usage: optional
Value type: <string>
Definition: Name of firmware image.
- ubwc-ipe-fetch-cfg
Usage: required
Value type: <u32>
Definition: UBWC IPE fetch configuration based on DDR device type.
- ubwc-ipe-write-cfg
Usage: required
Value type: <u32>
Definition: UBWC IPE write configuration based on DDR device type.
- ubwc-bps-fetch-cfg
Usage: required
Value type: <u32>
Definition: UBWC BPS fetch configuration based on DDR device type.
- ubwc-bps-write-cfg
Usage: required
Value type: <u32>
Definition: UBWC BPS write configuration based on DDR device type.
- ubwc-cfg
Usage: optional
Value type: <u32>
Definition: UBWC configuration, this is mandatory if above
ipe/bps ubwc properties are not used.
Examples:
a5: qcom,a5@ac00000 {
cell-index = <0>;
compatible = "qcom,cam-a5";
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
interrupts = <0 463 0>;
interrupt-names = "a5";
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "gcc_cam_ahb_clk",
"gcc_cam_axi_clk",
"soc_ahb_clk",
"cpas_ahb_clk",
"camnoc_axi_clk",
"icp_apb_clk",
"icp_atb_clk",
"icp_clk",
"icp_clk_src",
"icp_cti_clk",
"icp_ts_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_ICP_APB_CLK>,
<&clock_camcc CAM_CC_ICP_ATB_CLK>,
<&clock_camcc CAM_CC_ICP_CLK>,
<&clock_camcc CAM_CC_ICP_CLK_SRC>,
<&clock_camcc CAM_CC_ICP_CTI_CLK>,
<&clock_camcc CAM_CC_ICP_TS_CLK>;
clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>;
clock-cntl-level = "turbo";
fw_name = "CAMERA_ICP.elf";
/* "ubwc-cfg" is not used, even if defined the new property
tags will be priortized. If the new properties are not used
please specify "ubwc-cfg" in that case */
ubwc-ipe-fetch-cfg = <0x707b 0x7083>;
ubwc-ipe-write-cfg = <0x161ef 0x1620f>;
ubwc-bps-fetch-cfg = <0x707b 0x7083>
ubwc-bps-write-cfg = <0x161ef 0x1620f>;
qcom,ipe0 {
cell-index = <0>;
compatible = "qcom,cam-ipe";
regulator-names = "ipe0-vdd";
ipe0-vdd-supply = <&ipe_0_gdsc>;
clock-names = "ipe_0_ahb_clk",
"ipe_0_areg_clk",
"ipe_0_axi_clk",
"ipe_0_clk",
"ipe_0_clk_src";
src-clock-name = "ipe_0_clk_src";
clocks = <&clock_camcc CAM_CC_IPE_0_AHB_CLK>,
<&clock_camcc CAM_CC_IPE_0_AREG_CLK>,
<&clock_camcc CAM_CC_IPE_0_AXI_CLK>,
<&clock_camcc CAM_CC_IPE_0_CLK>,
<&clock_camcc CAM_CC_IPE_0_CLK_SRC>;
clock-rates = <0 0 0 0 240000000>,
<0 0 0 0 404000000>,
<0 0 0 0 480000000>,
<0 0 0 0 538000000>,
<0 0 0 0 600000000>;
clock-cntl-level = "lowsvs", "svs",
"svs_l1", "nominal", "turbo";
};
qcom,ipe1 {
cell-index = <1>;
compatible = "qcom,cam-ipe";
regulator-names = "ipe1-vdd";
ipe1-vdd-supply = <&ipe_1_gdsc>;
clock-names = "ipe_1_ahb_clk",
"ipe_1_areg_clk",
"ipe_1_axi_clk",
"ipe_1_clk",
"ipe_1_clk_src";
src-clock-name = "ipe_1_clk_src";
clocks = <&clock_camcc CAM_CC_IPE_1_AHB_CLK>,
<&clock_camcc CAM_CC_IPE_1_AREG_CLK>,
<&clock_camcc CAM_CC_IPE_1_AXI_CLK>,
<&clock_camcc CAM_CC_IPE_1_CLK>,
<&clock_camcc CAM_CC_IPE_1_CLK_SRC>;
clock-rates = <0 0 0 0 240000000>,
<0 0 0 0 404000000>,
<0 0 0 0 480000000>,
<0 0 0 0 538000000>,
<0 0 0 0 600000000>;
clock-cntl-level = "lowsvs", "svs",
"svs_l1", "nominal", "turbo";
};
bps: qcom,bps {
cell-index = <0>;
compatible = "qcom,cam-bps";
regulator-names = "bps-vdd";
bps-vdd-supply = <&bps_gdsc>;
clock-names = "bps_ahb_clk",
"bps_areg_clk",
"bps_axi_clk",
"bps_clk",
"bps_clk_src";
src-clock-name = "bps_clk_src";
clocks = <&clock_camcc CAM_CC_BPS_AHB_CLK>,
<&clock_camcc CAM_CC_BPS_AREG_CLK>,
<&clock_camcc CAM_CC_BPS_AXI_CLK>,
<&clock_camcc CAM_CC_BPS_CLK>,
<&clock_camcc CAM_CC_BPS_CLK_SRC>;
clock-rates = <0 0 0 0 200000000>,
<0 0 0 0 404000000>,
<0 0 0 0 480000000>,
<0 0 0 0 600000000>,
<0 0 0 0 600000000>;
clock-cntl-level = "lowsvs", "svs",
"svs_l1", "nominal", "turbo";
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-cam-ife-csid.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM Camera IFE CSID
Camera IFE CSID device provides the definitions for enabling
the IFE CSID hardware. It also provides the functions for the client
to control the IFE CSID hardware.
=======================
Required Node Structure
=======================
The IFE CSID device is described in one level of the device node.
======================================
First Level Node - CAM IFE CSID device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,csid170", "qcom,csid170_200", "qcom,csid175",
"qcom,csid175_200", "qcom,csid480", "qcom,csid-lite170",
"qcom,csid-lite175", "qcom,csid-lite480" or
"qcom,csid-custom480".
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg-names
Usage: required
Value type: <string>
Definition: Should be "csid".
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: Required
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: Required
Value type: <u32>
Definition: Interrupt associated with IFE CSID HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for IFE CSID HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for IFE CSID HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for IFE CSID HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: All different clock level node can support.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
Example:
qcom,csid0@acb3000 {
cell-index = <0>;
compatible = "qcom,csid480";
reg = <0xacb3000 0x1000>;
reg-names = "csid";
interrupts = <0 464 0>;
interrupt-names = "csid";
vdd-names = "camss", "ife0";
camss-supply = <&titan_top_gdsc>;
ife0-supply = <&ife_0_gdsc>;
clock-names = "soc_ahb_clk",
"cpas_ahb_clk",
"slow_ahb_clk_src",
"ife_clk",
"ife_clk_src",
"ife_csid_clk",
"ife_csid_clk_src",
"ife_cphy_rx_clk",
"cphy_rx_clk_src";
clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
<&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>;
clock-rates = <0 0 80000000 0 320000000 0 384000000 0 384000000>;
src-clock-name = "ife_csid_clk_src";
status = "ok";
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-cam-isp.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM Camera ISP
The MSM camera ISP driver provides the definitions for enabling
the Camera ISP hadware. It provides the functions for the Client to
control the ISP hardware.
=======================
Required Node Structure
=======================
The camera ISP device is described in one level of device node.
==================================
First Level Node - CAM ISP device
==================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-isp".
- arch-compat
Usage: required
Value type: <string>
Definition: Should be "vfe", "ife" or "tfe".
- ubwc-static-cfg
Usage: optional
Value type: <u32>
Definition: IFE UBWC static configuration based on DDR device type.
Example:
qcom,cam-isp {
compatible = "qcom,cam-isp";
arch-compat = "ife";
status = "ok";
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-cam-jpeg.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM Camera JPEG
The MSM camera JPEG devices are implemented multiple device nodes.
The root JPEG device node has properties defined to hint the driver
about the number of Encoder and DMA nodes available during the
probe sequence. Each node has multiple properties defined
for interrupts, clocks and regulators.
=======================
Required Node Structure
=======================
JPEG root interface node takes care of the handling account for number
of Encoder and DMA devices present on the hardware.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-jpeg".
- compat-hw-name
Usage: required
Value type: <string>
Definition: Should be "qcom,jpegenc" or "qcom,jpegdma".
- num-jpeg-enc
Usage: required
Value type: <u32>
Definition: Number of supported Encoder HW blocks.
- num-jpeg-dma
Usage: required
Value type: <u32>
Definition: Number of supported DMA HW blocks.
Example:
qcom,cam-jpeg {
compatible = "qcom,cam-jpeg";
compat-hw-name = "qcom,jpegenc",
"qcom,jpegdma";
num-jpeg-enc = <1>;
num-jpeg-dma = <1>;
status = "ok";
};
=======================
Required Node Structure
=======================
Encoder/DMA Nodes provide interface for JPEG driver about
the device register map, interrupt map, clocks and regulators.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam_jpeg_enc".
- reg-names
Usage: optional
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: optional
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: optional
Value type: <u32>
Definition: Offset of the register space compared to
to Camera base register space.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt associated with JPEG HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for JPEG HW.
- camss-vdd-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for JPEG HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for JPEG HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
Examples:
cam_jpeg_enc: qcom,jpegenc@ac4e000 {
cell-index = <0>;
compatible = "qcom,cam_jpeg_enc";
reg-names = "jpege_hw";
reg = <0xac4e000 0x4000>;
reg-cam-base = <0x4e000>;
interrupt-names = "jpeg";
interrupts = <0 474 0>;
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "camera_ahb",
"camera_axi",
"soc_ahb_clk",
"cpas_ahb_clk",
"camnoc_axi_clk",
"jpegenc_clk_src",
"jpegenc_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_JPEG_CLK_SRC>,
<&clock_camcc CAM_CC_JPEG_CLK>;
clock-rates = <0 0 0 0 0 600000000 0>;
src-clock-name = "jpegenc_clk_src";
clock-cntl-level = "nominal";
status = "ok";
};
cam_jpeg_dma: qcom,jpegdma@0xac52000{
cell-index = <0>;
compatible = "qcom,cam_jpeg_dma";
reg-names = "jpegdma_hw";
reg = <0xac52000 0x4000>;
reg-cam-base = <0x52000>;
interrupt-names = "jpegdma";
interrupts = <0 475 0>;
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names = "camera_ahb",
"camera_axi",
"soc_ahb_clk",
"cpas_ahb_clk",
"camnoc_axi_clk",
"jpegdma_clk_src",
"jpegdma_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_JPEG_CLK_SRC>,
<&clock_camcc CAM_CC_JPEG_CLK>;
clock-rates = <0 0 0 0 0 600000000 0>;
src-clock-name = "jpegdma_clk_src";
clock-cntl-level = "nominal";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera LRME
The MSM camera Low Resolution Motion Estimation device provides dependency
definitions for enabling Camera LRME HW. MSM camera LRME is implemented in
multiple device nodes. The root LRME device node has properties defined to
hint the driver about the LRME HW nodes available during the probe sequence.
Each node has multiple properties defined for interrupts, clocks and
regulators.
=======================
Required Node Structure
=======================
LRME root interface node takes care of the handling LRME high level
driver handling and controls underlying LRME hardware present.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-lrme"
- compat-hw-name
Usage: required
Value type: <string>
Definition: Should be "qcom,lrme"
- num-lrme
Usage: required
Value type: <u32>
Definition: Number of supported LRME HW blocks
Example:
qcom,cam-lrme {
compatible = "qcom,cam-lrme";
compat-hw-name = "qcom,lrme";
num-lrme = <1>;
};
=======================
Required Node Structure
=======================
LRME Node provides interface for Low Resolution Motion Estimation hardware
driver about the device register map, interrupt map, clocks, regulators.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,lrme"
- reg-names
Usage: optional
Value type: <string>
Definition: Name of the register resources
- reg
Usage: optional
Value type: <u32>
Definition: Register values
- reg-cam-base
Usage: optional
Value type: <u32>
Definition: Offset of the register space compared to
to Camera base register space
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt line associated with LRME HW
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for LRME HW
- camss-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names"
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for LRME HW
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks required for LRME HW
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels
Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name
Examples:
cam_lrme: qcom,lrme@ac6b000 {
cell-index = <0>;
compatible = "qcom,lrme";
reg-names = "lrme";
reg = <0xac6b000 0xa00>;
reg-cam-base = <0x6b000>;
interrupt-names = "lrme";
interrupts = <0 476 0>;
regulator-names = "camss";
camss-supply = <&titan_top_gdsc>;
clock-names = "camera_ahb",
"camera_axi",
"soc_ahb_clk",
"cpas_ahb_clk",
"camnoc_axi_clk",
"lrme_clk_src",
"lrme_clk";
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
<&clock_gcc GCC_CAMERA_AXI_CLK>,
<&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_LRME_CLK_SRC>,
<&clock_camcc CAM_CC_LRME_CLK>;
clock-rates = <0 0 0 0 0 0 0>,
<0 0 0 0 0 19200000 19200000>,
<0 0 0 0 0 19200000 19200000>,
<0 0 0 0 0 19200000 19200000>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
src-clock-name = "lrme_core_clk_src";
};

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* Qualcomm Technologies, Inc. MSM Camera OPE
The ope device node has properties defined to hint the driver
about the number of OPE nodes available during the
probe sequence. Each node has multiple properties defined
for interrupts, clocks and regulators.
=======================
Required Node Structure
=======================
OPE root interface node takes care of the handling account for number
of OPE devices present on the hardware.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,cam-ope".
- compat-hw-name
Usage: required
Value type: <string>
Definition: Should be "qcom,ope".
- num-ope
Usage: required
Value type: <u32>
Definition: Number of supported OPE HW blocks.
Example:
qcom,cam-ope {
compatible = "qcom,cam-ope";
compat-hw-name = "qcom,ope";
num-ope = <2>;
status = "ok";
};
=======================
Required Node Structure
=======================
OPE Node provides interface for Image Control Processor driver
about the OPE register map, interrupt map, clocks, regulators.
- cell-index
Usage: required
Value type: <u32>
Definition: Node instance number.
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,ope".
- reg-names
Usage: optional
Value type: <string>
Definition: Name of the register resources.
- reg
Usage: optional
Value type: <u32>
Definition: Register values.
- reg-cam-base
Usage: optional
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: optional
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: optional
Value type: <u32>
Definition: Interrupt associated with OPE HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for OPE HW.
- camss-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed
in "regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for CDM HW.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for CDM HW.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: List of strings corresponds clock-rates levels.
Supported strings: lowsvs, svs, svs_l1, nominal, turbo.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
Examples:
qcom,cam-ope {
compatible = "qcom,cam-ope";
compat-hw-name = "qcom,ope";
num-ope = <1>;
status = "ok";
};
ope: qcom,ope@ac00000 {
cell-index = <0>;
compatible = "qcom,ope";
reg =
<0x42000 0x400>,
<0x42400 0x200>,
<0x42600 0x200>,
<0x42800 0x4400>,
<0x46c00 0x190>,
<0x46d90 0x1270>;
reg-names =
"ope_cdm",
"ope_top",
"ope_qos",
"ope_pp",
"ope_bus_rd",
"ope_bus_wr";
reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ope";
regulator-names = "camss-vdd";
camss-vdd-supply = <&gcc_camss_top_gdsc>;
clock-names =
"ope_ahb_clk_src",
"ope_ahb_clk",
"ope_clk_src",
"ope_clk";
clocks =
<&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_AHB_CLK>,
<&gcc GCC_CAMSS_OPE_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_CLK>;
clock-rates =
<200000000 0 480000000 0>,
<400000000 0 600000000 0>;
clock-cntl-level = "svs", "turbo";
src-clock-name = "ope_clk_src";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera SMMU
The MSM camera SMMU device provides SMMU context bank definitions
for all HW blocks that need to map IOVA to physical memory. These
definitions consist of various properties that define how the
IOVA address space is laid out for each HW block in the camera
subsystem.
=======================
Required Node Structure
=======================
The camera SMMU device must be described in three levels of device nodes. The
first level describes the overall SMMU device. Within it, second level nodes
describe individual context banks that map different stream ids. There can
also be second level nodes describing firmware device nodes. Each HW block
such as IFE, ICP maps into these second level device nodes. All context bank
specific properties that define how the IOVA is laid out is contained within
third level device nodes within the second level device nodes.
During the kernel initialization all the devices are probed recursively and
a device pointer is created for each context bank keeping track of the IOVA
mapping information.
Duplicate regions of the same type are not allowed within the same
context bank. All context banks must contain an IO region at the very least.
==================================
First Level Node - CAM SMMU device
==================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,msm-cam-smmu".
===================================================================
Second Level Node - CAM SMMU context bank device or firmware device
===================================================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,msm-cam-smmu-cb" or "qcom,msm-cam-smmu-fw-dev".
- memory-region
Usage: optional
Value type: <phandle>
Definition: Should specify the phandle of the memory region for firmware.
allocation
- iommus
Usage: required
Value type: <phandle u32 u32>
Definition: first cell is phandle of the iommu, second cell is stream id
and third cell is SMR mask.
- label
Usage: required
Value type: <string>
Definition: Should specify a string label to identify the context bank.
- qcom,secure-cb
Usage: optional
Value type: boolean
Definition: Specifies if the context bank is a secure context bank.
=============================================
Third Level Node - CAM SMMU memory map device
=============================================
- iova-region-name
Usage: required
Value type: <string>
Definition: Should specify a string label to identify the IOVA region.
- iova-region-start
Usage: required
Value type: <u32>
Definition: Should specify start IOVA for region.
- iova-region-len
Usage: required
Value type: <u32>
Definition: Should specify length for IOVA region.
- iova-region-id
Usage: required
Value type: <u32>
Definition: Should specify the numerical identifier for IOVA region.
Allowed values are: 0x00 to 0x03
- Firmware region: 0x00
- Shared region: 0x01
- Scratch region: 0x02
- IO region: 0x03
- iova-granularity
Usage: optional
Value type: <u32>
Definition: Should specify IOVA granularity for shared memory region.
Example:
qcom,cam_smmu@0 {
compatible = "qcom,msm-cam-smmu";
msm_cam_smmu_icp {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x1078>,
<&apps_smmu 0x1020>,
<&apps_smmu 0x1028>,
<&apps_smmu 0x1040>,
<&apps_smmu 0x1048>,
<&apps_smmu 0x1030>,
<&apps_smmu 0x1050>;
label = "icp";
icp_iova_mem_map: iova-mem-map {
iova-mem-region-firmware {
/* Firmware region is 5MB */
iova-region-name = "firmware";
iova-region-start = <0x0>;
iova-region-len = <0x500000>;
iova-region-id = <0x0>;
status = "ok";
};
iova-mem-region-shared {
/* Shared region is 100MB long */
iova-region-name = "shared";
iova-region-start = <0x7400000>;
iova-region-len = <0x6400000>;
iova-region-id = <0x1>;
iova-granularity = <0x15>;
status = "ok";
};
iova-mem-region-io {
/* IO region is approximately 3.5 GB */
iova-region-name = "io";
iova-region-start = <0xd800000>;
iova-region-len = <0xd2800000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
};

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* Qualcomm Technologies, Inc. MSM Camera TFE CSID
Camera TFE CSID device provides the definitions for enabling
the TFE CSID hardware. It also provides the functions for the client
to control the TFE CSID hardware.
=======================
Required Node Structure
=======================
The TFE CSID device is described in one level of the device node.
======================================
First Level Node - CAM TFE CSID device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,csid530"
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg-names
Usage: required
Value type: <string>
Definition: Should be "csid".
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: Required
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: Required
Value type: <u32>
Definition: Interrupt associated with TFE CSID HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for TFE CSID HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for TFE CSID HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for TFE CSID HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- clock-cntl-level
Usage: required
Value type: <string>
Definition: All different clock level node can support.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
Example:
qcom,tfe_csid0@5c6e000 {
cell-index = <0>;
compatible = "qcom,csid530";
reg-names = reg-names = "csid", "top", "camnoc";
reg = <0x5c6e000 0x5000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
interrupt-names = "csid0";
interrupts = <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<240000000 0 0 0 256000000 0 0>,
<384000000 0 0 0 460800000 0 0>,
<426400000 0 0 0 576000000 0 0>,
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera TFE
Camera TFE device provides the definitions for enabling
the TFE hardware. It also provides the functions for the client
to control the TFE hardware.
=======================
Required Node Structure
=======================
The TFE device is described in one level of the device node.
======================================
First Level Node - CAM TFE device
======================================
Required properties:
- compatible
Usage: required
Value type: <string>
Definition: Should specify the compatibility string for matching the
driver. e.g. "qcom,tfe530"
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg-names
Usage: required
Value type: <string>
Definition: Should specify the name of the register block.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: Required
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: Required
Value type: <u32>
Definition: Interrupt associated with TFE HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for TFE HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for TFE HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for TFE HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
Optional properties:
- clock-names-option
Usage: optional
Value type: <string>
Definition: Optional clock names.
- clocks-option
Usage: required if clock-names-option defined
Value type: <phandle>
Definition: List of optinal clocks used for TFE HW.
- clock-rates-option
Usage: required if clock-names-option defined
Value type: <u32>
Definition: List of clocks rates for optional clocks.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- qcom,cam-cx-ipeak:
Usage: optional
Value type: <phandle bit>
phandle - phandle of CX Ipeak device node
bit - Every bit corresponds to a client of CX Ipeak
Definition: CX Ipeak is a mitigation scheme which throttles camera frequency
if all the clients are running at their respective threshold
frequencies to limit CX peak current.
driver in the relevant register.
- scl-clk-names:
Usage: optional
Value type: <string>
Definition: Scalable clock names to identify which clocks needs to update
along with source clock.
Example:
cam_tfe0: qcom,tfe0@5c6e000{
cell-index = <0>;
compatible = "qcom,tfe530";
reg-names = "tfe0";
reg = <0x5c6e000 0x5000>;
reg-cam-base = <0x6e000>;
interrupt-names = "tfe0";
interrupts = <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk",
"tfe_axi_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>,
<&gcc GCC_CAMSS_AXI_CLK>;
clock-rates =
<256000000 0 150000000>,
<460800000 0 200000000>,
<576000000 0 300000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera TPG
Camera TPG device provides the definitions for enabling
the TPG hardware. It also provides the functions for the client
to control the TPG hardware.
=======================
Required Node Structure
=======================
The TPG device is described in one level of the device node.
======================================
First Level Node - CAM TPG device
======================================
Required properties:
- compatible
Usage: required
Value type: <string>
Definition: Should specify the compatibility string for matching the
driver. e.g. "qcom,tpgv1"
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg-names
Usage: required
Value type: <string>
Definition: Should specify the name of the register block.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: Required
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: Required
Value type: <u32>
Definition: Interrupt associated with TFE HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for TFE HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for TFE HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for TFE HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- scl-clk-names:
Usage: optional
Value type: <string>
Definition: Scalable clock names to identify which clocks needs to update
along with source clock.
Example:
cam_tfe_tpg0: qcom,tpg0@5c66000 {
cell-index = <0>;
compatible = "qcom,tpgv1";
reg-names = "tpg0", "top";
reg = <0x5c66000 0x400>,
<0x5c11000 0x1000>;
reg-cam-base = <0x66000 0x11000>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"cphy_rx_clk_src",
"tfe_0_cphy_rx_clk";
clocks =
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>;
clock-rates =
<240000000 240000000>,
<341333333 341333333>,
<384000000 384000000>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "cphy_rx_clk_src";
clock-control-debugfs = "false";
status = "ok";
};

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* Qualcomm Technologies, Inc. MSM Camera VFE
Camera VFE device provides the definitions for enabling
the VFE hardware. It also provides the functions for the client
to control the VFE hardware.
=======================
Required Node Structure
=======================
The VFE device is described in one level of the device node.
======================================
First Level Node - CAM VFE device
======================================
Required properties:
- compatible
Usage: required
Value type: <string>
Definition: Should specify the compatibility string for matching the
driver. e.g. "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", "qcom,vfe175_130",
"qcom,vfe170_150", "qcom,vfe-lite480", "qcom,vfe-lite175", "qcom,vfe-lite175_130",
"qcom,vfe-lite170".
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg-names
Usage: required
Value type: <string>
Definition: Should specify the name of the register block.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- interrupt-names
Usage: Required
Value type: <string>
Definition: Name of the interrupt.
- interrupts
Usage: Required
Value type: <u32>
Definition: Interrupt associated with VFE HW.
- regulator-names
Usage: required
Value type: <string>
Definition: Name of the regulator resources for VFE HW.
- xxxx-supply
Usage: required
Value type: <phandle>
Definition: Regulator reference corresponding to the names listed in
"regulator-names".
- clock-names
Usage: required
Value type: <string>
Definition: List of clock names required for VFE HW.
- clocks
Usage: required
Value type: <phandle>
Definition: List of clocks used for VFE HW.
- clock-rates
Usage: required
Value type: <u32>
Definition: List of clocks rates.
- src-clock-name
Usage: required
Value type: <string>
Definition: Source clock name.
Optional properties:
- clock-names-option
Usage: optional
Value type: <string>
Definition: Optional clock names.
- clocks-option
Usage: required if clock-names-option defined
Value type: <phandle>
Definition: List of optinal clocks used for VFE HW.
- clock-rates-option
Usage: required if clock-names-option defined
Value type: <u32>
Definition: List of clocks rates for optional clocks.
- clock-control-debugfs
Usage: optional
Value type: <string>
Definition: Enable/Disable clk rate control.
- qcom,cam-cx-ipeak:
Usage: optional
Value type: <phandle bit>
phandle - phandle of CX Ipeak device node
bit - Every bit corresponds to a client of CX Ipeak
Definition: CX Ipeak is a mitigation scheme which throttles camera frequency
if all the clients are running at their respective threshold
frequencies to limit CX peak current.
driver in the relevant register.
- scl-clk-names:
Usage: optional
Value type: <string>
Definition: Scalable clock names to identify which clocks needs to update
along with source clock.
Example:
qcom,vfe0@acaf000 {
cell-index = <0>;
compatible = "qcom,vfe480";
reg-names = "ife";
reg = <0xacaf000 0x4000>;
interrupts = <0 465 0>;
interrupt-names = "ife";
vdd-names = "camss-vdd", "ife0-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
ife0-vdd-supply = <&ife_0_gdsc>;
clock-names = "soc_ahb_clk",
"cpas_ahb_clk",
"slow_ahb_clk_src",
"ife_clk",
"ife_clk_src",
"ife_csid_clk",
"ife_csid_clk_src",
"camnoc_axi_clk",
"ife_axi_clk",
clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
<&clock_camcc CAM_CC_CPAS_AHB_CLK>,
<&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CLK>,
<&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
<&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
<&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>;
src-clock-name = "ife_clk_src";
clock-names-option = "ife_dsp_clk";
clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;
clock-rates-option = <600000000>;
scl-clk-en;
scl-clk-names = "ife_axi_clk";
qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;
status = "ok";
};

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arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-camera-flash.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM FLASH
The MSM camera Flash driver provides the definitions for
enabling and disabling LED Torch/Flash by requesting it to
PMIC/I2C/GPIO based hardware. It provides the functions for
the Client to control the Flash hardware.
=======================================================
Required Node Structure
=======================================================
The Flash device is described in one level of the device node.
======================================
First Level Node - CAM FLASH device
======================================
- compatible
Usage: required
Value type: <string>
Definition: Should be "qcom,camera-flash".
- cell-index
Usage: required
Value type: <u32>
Definition: Should specify the hardware index id.
- reg
Usage: required
Value type: <u32>
Definition: Register values.
- flash-source
Usage: required
Value type: <phandle>
Definition: Should contain array of phandles to Flash source nodes.
- torch-source
Usage: required
Value type: <phandle>
Definition: Should contain array of phandles to torch source nodes.
- switch-source
Usage: Optional
Value type: <phandle>
Definition: Should contain phandle to switch source nodes.
- slave-id
Usage: optional
Value type: <u32>
Definition: should contain i2c slave address, device id address
and expected id read value.
- cci-master
Usage: optional
Value type: <u32>
Definition: should contain i2c master id to be used for this camera
flash.
- max-current
Usage: optional
Value type: <u32>
Definition: Max current in mA supported by flash
- max-duration
Usage: optional
Value type: <u32>
Definition: Max duration in ms flash can glow.
- wled-flash-support
Usage: optional
Value type: <boolean>
Definition: To identity wled flash hardware support.
- gpios
Usage: optional
Value type: <u32>
Definition: should specify the gpios to be used for the flash.
- gpio-req-tbl-num
Usage: optional
Value type: <u32>
Definition: should specify the gpio table index.
- gpio-req-tbl-flags
Usage: optional
Value type: <u32>
Definition: should specify the gpio functions.
- gpio-req-tbl-label
Usage: optional
Value type: <u32>
Definition: should specify the gpio labels.
- gpio-flash-reset
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by flash's "flash reset" pin.
- gpio-flash-en
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by flash's "flash enable" pin.
- gpio-flash-now
Usage: optional
Value type: <u32>
Definition: should contain index to gpio used by flash's "flash now" pin.
Example:
led_flash_rear: qcom,camera-flash@0 {
reg = <0x00 0x00>;
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pmi8998_flash0 &pmi8998_flash1>;
torch-source = <&pmi8998_torch0 &pmi8998_torch1>;
switch-source = <&pmi8998_switch0>;
wled-flash-support;
qcom,slave-id = <0x00 0x00 0x0011>;
qcom,cci-master = <0>;
gpios = <&msmgpio 23 0>,
<&msmgpio 24 0>;
<&msmgpio 25 0>;
qcom,gpio-flash-reset = <0>;
qcom,gpio-flash-en = <0>;
qcom,gpio-flash-now = <1>;
qcom,gpio-req-tbl-num = <0 1>;
qcom,gpio-req-tbl-flags = <0 0>;
qcom,gpio-req-tbl-label = "FLASH_EN",
"FLASH_NOW";
qcom,max-current = <1500>;
qcom,max-duration = <1200>;
};

13
arch/arm64/boot/dts/vendor/qcom/camera/bindings/msm-camera.txt vendored Executable file
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* Qualcomm Technologies, Inc. MSM Camera
Required properties:
- compatible :
- "qcom,cam-req-mgr"
- qcom,sensor-manual-probe : specify if sensor probes at kernel boot time or user driven
Example:
qcom,cam-req-mgr {
compatible = "qcom,cam-req-mgr";
qcom,sensor-manual-probe;
};

674
arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-cdp.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,camcc-kona.h>
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear: qcom,camera-flash@4 {
cell-index = <4>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux: qcom,camera-flash@5 {
cell-index = <5>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux2: qcom,camera-flash@6 {
cell-index = <6>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_wide: qcom,actuator4 {
cell-index = <4>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_tele: qcom,actuator5 {
cell-index = <5>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_wide: qcom,eeprom4 {
cell-index = <4>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_tele: qcom,eeprom5 {
cell-index = <5>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_triple_wide>;
led-flash-src = <&led_flash_triple_rear>;
eeprom-src = <&eeprom_triple_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor5 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_triple_tele>;
actuator-src = <&actuator_triple_tele>;
led-flash-src = <&led_flash_triple_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};
&cam_cci1 {
actuator_triple_uw: qcom,actuator6 {
cell-index = <6>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <0 2800000 1056000 0 2856000>;
rgltr-max-voltage = <0 3000000 1056000 0 3104000>;
rgltr-load-current = <0 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_tof: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3600000 0>;
rgltr-max-voltage = <0 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_uw: qcom,eeprom6 {
cell-index = <6>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <3>;
eeprom-src = <&eeprom_tof>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 3600000 0>;
rgltr-max-voltage = <1800000 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor6 {
cell-index = <6>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_triple_uw>;
actuator-src = <&actuator_triple_uw>;
led-flash-src = <&led_flash_triple_rear_aux2>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-mtp.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,camcc-kona.h>
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear: qcom,camera-flash@4 {
cell-index = <4>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux: qcom,camera-flash@5 {
cell-index = <5>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux2: qcom,camera-flash@6 {
cell-index = <6>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_wide: qcom,actuator4 {
cell-index = <4>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_tele: qcom,actuator5 {
cell-index = <5>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_wide: qcom,eeprom4 {
cell-index = <4>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_tele: qcom,eeprom5 {
cell-index = <5>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
actuator-src = <&actuator_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_triple_wide>;
led-flash-src = <&led_flash_triple_rear>;
eeprom-src = <&eeprom_triple_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor5 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_triple_tele>;
actuator-src = <&actuator_triple_tele>;
led-flash-src = <&led_flash_triple_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};
&cam_cci1 {
actuator_triple_uw: qcom,actuator6 {
cell-index = <6>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_uw: qcom,eeprom6 {
cell-index = <6>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_tof: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3600000 0>;
rgltr-max-voltage = <0 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <3>;
eeprom-src = <&eeprom_tof>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 3600000 0>;
rgltr-max-voltage = <1800000 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor6 {
cell-index = <6>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_triple_uw>;
actuator-src = <&actuator_triple_uw>;
led-flash-src = <&led_flash_triple_rear_aux2>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

674
arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-qrd.dtsi vendored Executable file
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@ -0,0 +1,674 @@
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear: qcom,camera-flash@4 {
cell-index = <4>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux: qcom,camera-flash@5 {
cell-index = <5>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_triple_rear_aux2: qcom,camera-flash@6 {
cell-index = <6>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_wide: qcom,actuator4 {
cell-index = <4>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_tele: qcom,actuator5 {
cell-index = <5>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_uw: qcom,actuator6 {
cell-index = <6>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_wide: qcom,eeprom4 {
cell-index = <4>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_tele: qcom,eeprom5 {
cell-index = <5>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_uw: qcom,eeprom6 {
cell-index = <6>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
actuator-src = <&actuator_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_triple_wide>;
led-flash-src = <&led_flash_triple_rear>;
eeprom-src = <&eeprom_triple_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor5 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_triple_tele>;
actuator-src = <&actuator_triple_tele>;
led-flash-src = <&led_flash_triple_rear_aux>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor6 {
cell-index = <6>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_triple_uw>;
actuator-src = <&actuator_triple_uw>;
led-flash-src = <&led_flash_triple_rear_aux2>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};
&cam_cci1 {
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_tof: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3600000 0>;
rgltr-max-voltage = <0 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <3>;
eeprom-src = <&eeprom_tof>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 3600000 0>;
rgltr-max-voltage = <1800000 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

278
arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-rb5.dtsi vendored Executable file
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@ -0,0 +1,278 @@
&soc {
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&tlmm {
cam_sensor_active_gmsl: cam_sensor_active_gmsl {
/* RESET */
mux {
pins = "gpio99";
function = "gpio";
};
config {
pins = "gpio99";
bias-pull-up;
drive-strength = <2>; /* 2 MA */
output-high;
};
};
cam_sensor_suspend_gmsl: cam_sensor_suspend_gmsl {
/* RESET */
mux {
pins = "gpio99";
function = "gpio";
};
config {
pins = "gpio99";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
};
&cam_cci0 {
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 0>;
rgltr-max-voltage = <1800000 0>;
rgltr-load-current = <120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 0>;
rgltr-max-voltage = <1800000 0>;
rgltr-load-current = <120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <120000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor4 {
cell-index = <4>;
status = "disable";
};
qcom,cam-sensor5 {
cell-index = <5>;
status = "disable";
};
};
&cam_cci1 {
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 0>;
rgltr-max-voltage = <1800000 0>;
rgltr-load-current = <120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <4>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 0>;
rgltr-max-voltage = <1800000 0>;
rgltr-load-current = <120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_gmsl>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_gmsl>;
gpios = <&tlmm 94 0>,
<&tlmm 99 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET4";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
qcom,cam-sensor5 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <4>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 0>;
rgltr-max-voltage = <1800000 0>;
rgltr-load-current = <120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_gmsl>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_gmsl>;
gpios = <&tlmm 94 0>,
<&tlmm 99 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET4";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-xr.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,camcc-kona.h>
&soc {
led_flash_rear: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_rear_aux: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_eye_track: qcom,camera-flash@2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
gpios = <&tlmm 22 0>,
<&tlmm 23 0>,
<&tlmm 24 0>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <0 0 0>;
gpio-req-tbl-label = "TCKING_LED_1V2_EN",
"TCKING_LED_3V3_EN",
"TCKING_LED_EN";
gpio-req-tbl-delay = <20 20 20>;
status = "ok";
};
led_flash_triple_rear: qcom,camera-flash@4 {
cell-index = <4>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_triple_rear_aux: qcom,camera-flash@5 {
cell-index = <5>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_triple_rear_aux2: qcom,camera-flash@6 {
cell-index = <6>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
shared-gpios = <1184 1183 1182 1214 1245 1217 1216 1215>;
pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend";
pinctrl-0 = <&cam_sensor_6dof_vana_active
&cam_sensor_6dof_vdig_active
&cam_sensor_6dof_vio_active
&cam_sensor_et_vana_active
&cam_sensor_et_vio_active
&cam_sensor_rgb_vana_active
&cam_sensor_rgb_vio_active
&cam_sensor_rgb_vdig_active>;
pinctrl-1 = <&cam_sensor_6dof_vana_suspend
&cam_sensor_6dof_vdig_suspend
&cam_sensor_6dof_vio_suspend
&cam_sensor_et_vana_suspend
&cam_sensor_et_vio_suspend
&cam_sensor_rgb_vana_suspend
&cam_sensor_rgb_vio_suspend
&cam_sensor_rgb_vdig_suspend>;
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_wide: qcom,actuator4 {
cell-index = <4>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_tele: qcom,actuator5 {
cell-index = <5>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_wide: qcom,eeprom4 {
cell-index = <4>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_tele: qcom,eeprom5 {
cell-index = <5>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* RGB Left (Master) */
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rgbleft>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rgbleft>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>,
<&tlmm 117 0>,
<&tlmm 116 0>,
<&tlmm 115 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA2",
"CAM_VIO2",
"CAM_VDIG2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* RGB Right (Slave) */
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <3>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_rgbright>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_rgbright>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>,
<&tlmm 117 0>,
<&tlmm 116 0>,
<&tlmm 115 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3",
"CAM_VANA3",
"CAM_VIO3",
"CAM_VDIG3";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* 6DOF Left (Slave) */
qcom,cam-sensor4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <4>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <6000000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk4_active
&cam_sensor_active_6dofright>;
pinctrl-1 = <&cam_sensor_mclk4_suspend
&cam_sensor_suspend_6dofright>;
gpios = <&tlmm 98 0>,
<&tlmm 131 0>,
<&tlmm 84 0>,
<&tlmm 83 0>,
<&tlmm 82 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK4",
"CAM_RESET4",
"CAM_VANA4",
"CAM_VIO4",
"CAM_VDIG4";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK4_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* 6DOF Right (Master) */
qcom,cam-sensor5 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <5>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <6000000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk5_active
&cam_sensor_active_6dofleft>;
pinctrl-1 = <&cam_sensor_mclk5_suspend
&cam_sensor_suspend_6dofleft>;
gpios = <&tlmm 99 0>,
<&tlmm 130 0>,
<&tlmm 84 0>,
<&tlmm 83 0>,
<&tlmm 82 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK5",
"CAM_RESET5",
"CAM_VANA5",
"CAM_VIO5",
"CAM_VDIG5";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK5_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};
&cam_cci1 {
actuator_triple_uw: qcom,actuator6 {
cell-index = <6>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_uw: qcom,eeprom6 {
cell-index = <6>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_tof: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3600000 0>;
rgltr-max-voltage = <0 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* ET Left (Master) */
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_etleft>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_etleft>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>,
<&tlmm 114 0>,
<&tlmm 145 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VANA0",
"CAM_VIO0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* ET Right (Slave) */
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
led-flash-src = <&led_flash_eye_track>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_etright>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_etright>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>,
<&tlmm 114 0>,
<&tlmm 145 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VANA1",
"CAM_VIO1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/kona-camera-sensor-xrfusion.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,camcc-kona.h>
&soc {
led_flash_rear: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_rear_aux: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_eye_track: qcom,camera-flash@2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
gpios = <&tlmm 22 0>,
<&tlmm 23 0>,
<&tlmm 24 0>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <0 0 0>;
gpio-req-tbl-label = "TCKING_LED_1V2_EN",
"TCKING_LED_3V3_EN",
"TCKING_LED_EN";
gpio-req-tbl-delay = <20 20 20>;
status = "ok";
};
led_flash_triple_rear: qcom,camera-flash@4 {
cell-index = <4>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_triple_rear_aux: qcom,camera-flash@5 {
cell-index = <5>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
led_flash_triple_rear_aux2: qcom,camera-flash@6 {
cell-index = <6>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "disabled";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
shared-gpios = <1143 1142 1141 1214 1245 1217 1216 1215>;
pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend";
pinctrl-0 = <&cam_sensor_6dof_vana_active
&cam_sensor_6dof_vdig_active
&cam_sensor_6dof_vio_active
&cam_sensor_et_vana_active
&cam_sensor_et_vio_active
&cam_sensor_rgb_vana_active
&cam_sensor_rgb_vio_active
&cam_sensor_rgb_vdig_active>;
pinctrl-1 = <&cam_sensor_6dof_vana_suspend
&cam_sensor_6dof_vdig_suspend
&cam_sensor_6dof_vio_suspend
&cam_sensor_et_vana_suspend
&cam_sensor_et_vio_suspend
&cam_sensor_rgb_vana_suspend
&cam_sensor_rgb_vio_suspend
&cam_sensor_rgb_vdig_suspend>;
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_wide: qcom,actuator4 {
cell-index = <4>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
actuator_triple_tele: qcom,actuator5 {
cell-index = <5>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <1>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_wide: qcom,eeprom4 {
cell-index = <4>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l5>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1104000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_rear>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_rear>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_tele: qcom,eeprom5 {
cell-index = <5>;
compatible = "qcom,eeprom";
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1200000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_rear_aux>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_rear_aux>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-position = <0>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* RGB Left (Master) */
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <2>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rgbleft>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rgbleft>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>,
<&tlmm 117 0>,
<&tlmm 116 0>,
<&tlmm 115 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA2",
"CAM_VIO2",
"CAM_VDIG2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* RGB Right(Slave) */
qcom,cam-sensor3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <3>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_rgbright>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_rgbright>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>,
<&tlmm 117 0>,
<&tlmm 116 0>,
<&tlmm 115 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3",
"CAM_VANA3",
"CAM_VIO3",
"CAM_VDIG3";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* 6DOF Left (Slave) */
qcom,cam-sensor4 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <4>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <6000000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk4_active
&cam_sensor_active_6dofright>;
pinctrl-1 = <&cam_sensor_mclk4_suspend
&cam_sensor_suspend_6dofright>;
gpios = <&tlmm 98 0>,
<&tlmm 131 0>,
<&tlmm 43 0>,
<&tlmm 41 0>,
<&tlmm 42 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK4",
"CAM_RESET4",
"CAM_VANA4",
"CAM_VIO4",
"CAM_VDIG4";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK4_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* 6DOF Right (Master) */
qcom,cam-sensor5 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <5>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <6000000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk5_active
&cam_sensor_active_6dofleft>;
pinctrl-1 = <&cam_sensor_mclk5_suspend
&cam_sensor_suspend_6dofleft>;
gpios = <&tlmm 99 0>,
<&tlmm 130 0>,
<&tlmm 43 0>,
<&tlmm 41 0>,
<&tlmm 42 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK5",
"CAM_RESET5",
"CAM_VANA5",
"CAM_VIO5",
"CAM_VDIG5";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK5_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};
&cam_cci1 {
actuator_triple_uw: qcom,actuator6 {
cell-index = <6>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2856000>;
rgltr-max-voltage = <3104000>;
rgltr-load-current = <100000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_triple_uw: qcom,eeprom6 {
cell-index = <6>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l3>;
cam_clk-supply = <&titan_top_gdsc>;
cam_vaf-supply = <&pm8150a_l7>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <1800000 2800000 1056000 0 2856000>;
rgltr-max-voltage = <1800000 3000000 1056000 0 3104000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_active_rst2>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_suspend_rst2>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <0>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
eeprom_tof: qcom,eeprom3 {
cell-index = <3>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&vreg_tof>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3600000 0>;
rgltr-max-voltage = <0 3600000 0>;
rgltr-load-current = <180000 120000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk3_active
&cam_sensor_active_3>;
pinctrl-1 = <&cam_sensor_mclk3_suspend
&cam_sensor_suspend_3>;
gpios = <&tlmm 97 0>,
<&tlmm 109 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK3",
"CAM_RESET3";
sensor-position = <1>;
sensor-mode = <0>;
cci-master = <1>;
status = "disabled";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* ET Left (Master): Combo Mode */
qcom,cam-sensor0 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1104000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1104000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_active_etleft>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_suspend_etleft>;
gpios = <&tlmm 94 0>,
<&tlmm 93 0>,
<&tlmm 114 0>,
<&tlmm 145 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VANA0",
"CAM_VIO0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* ET Right (Slave): Combo Mode */
qcom,cam-sensor1 {
cell-index = <5>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
led-flash-src = <&led_flash_eye_track>;
cam_vio-supply = <&pm8009_l7>;
cam_bob-supply = <&pm8150a_bob>;
cam_vana-supply = <&pm8009_l6>;
cam_vdig-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <600000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_active_etright>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_suspend_etright>;
gpios = <&tlmm 95 0>,
<&tlmm 92 0>,
<&tlmm 114 0>,
<&tlmm 145 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_VANA1",
"CAM_VIO1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* Face Tracking */
qcom,cam-sensor6 {
cell-index = <6>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_bob-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8009_l6>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_bob";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 3008000>;
rgltr-max-voltage = <1800000 3000000 1200000 0 3960000>;
rgltr-load-current = <6000000 80000 1200000 0 2000000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk6_active
&cam_sensor_active_etright>;
pinctrl-1 = <&cam_sensor_mclk6_suspend
&cam_sensor_active_etright>;
gpios = <&tlmm 100 0>,
<&tlmm 113 0>,
<&tlmm 51 0>,
<&tlmm 50 0>,
<&tlmm 49 0>;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vio = <3>;
gpio-vdig = <4>;
gpio-req-tbl-num = <0 1 2 3 4>;
gpio-req-tbl-flags = <1 0 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK6",
"CAM_RESET6",
"CAM_VANA6",
"CAM_VIO6",
"CAM_VDIG6";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK6_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

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&pm8009_gpios{
cam_sensor_pmi_gpio {
cam_sensor_rear_2_ana_active: cam_sensor_rear_2_ana_active {
pins = "gpio1";
function = "normal";
power-source = <0>;
output-low;
input-disable;
};
cam_sensor_rear_2_ana_suspend: cam_sensor_rear_2_ana_suspend {
pins = "gpio1";
function = "normal";
power-source = <0>;
bias-pull-down;
input-disable;
};
};
};
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_wide: qcom,camera-flash2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear_0: qcom,actuator@0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8009_l5>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <3000000>;
rgltr-load-current = <600000>;
};
ois_rear_0: qcom,ois@0{
cell-index = <0>;
reg = <0>;
compatible = "qcom,ois";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vaf-supply = <&pm8009_l6>;
regulator-names ="cam_vio","cam_vdig","cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000>;
rgltr-max-voltage = <0 1104000 2800000>;
rgltr-load-current = <0 1200000 1200000>;
cci-master = <0>;
status = "ok";
ois_gyro,position=<3>;
ois,type=<0>;
ois_gyro,type=<3>;
ois,name="LC898124";
ois_module,vendor=<0>;
ois_actuator,vednor=<0>;
ois,fw=<1>;
};
eeprom_rear_0: qcom,eeprom@0 {
cell-index = <0>;
compatible = "qcom,eeprom";
reg = <0x0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_1: qcom,eeprom@1 {
cell-index = <1>;
compatible = "qcom,eeprom";
reg = <0x1>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <0 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*wide camera*/
qcom,cam-sensor@0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
reg = <0x0>;
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_0>;
eeprom-src = <&eeprom_rear_0>;
ois-src = <&ois_rear_0>;
led-flash-src = <&led_flash_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_vaf-supply = <&pm8009_l5>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2","cam_vaf",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 2800000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 3000000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra_camera*/
qcom,cam-sensor@3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
reg = <0x3>;
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_1>;
led-flash-src = <&led_flash_rear_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <100000 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&cam_cci1 {
actuator_rear_1: qcom,actuator@0 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_bob>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <3008000>;
rgltr-max-voltage = <3960000>;
rgltr-load-current = <100000>;
/*gpio request at sensor
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 159 0>;
gpio-vaf = <0>;
gpio-req-tbl-num = <0>;
gpio-req-tbl-flags = <0>;
gpio-req-tbl-label = "CAMIF_vaf";*/
};
eeprom_front_0: qcom,eeprom@2 {
cell-index = <2>;
compatible = "qcom,eeprom";
reg = <0x02>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_2: qcom,eeprom@3 {
cell-index = <3>;
compatible = "qcom,eeprom";
reg = <0x03>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*front camera*/
qcom,cam-sensor@2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
reg = <0x02>;
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front_0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra wide*/
qcom,cam-sensor@1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
reg = <0x01>;
csiphy-sd-index = <3>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
actuator-src = <&actuator_rear_1>;
eeprom-src = <&eeprom_rear_2>;
led-flash-src = <&led_flash_rear_aux>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active
&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend
&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>,
<&tlmm 159 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2",
"CAM_VAF";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&tlmm {
cam_sensor_rear_0_clock_active: cam_sensor_rear_0_clock_active {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_clock_suspend: cam_sensor_rear_0_clock_suspend {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_active: cam_sensor_rear_1_clock_active {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_suspend: cam_sensor_rear_1_clock_suspend {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_active: cam_sensor_front_clock_active {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_suspend: cam_sensor_front_clock_suspend {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_active: cam_sensor_rear_2_clock_active {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_suspend: cam_sensor_rear_2_clock_suspend {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_active: cam_sensor_rear_0_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_suspend: cam_sensor_rear_0_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_active: cam_sensor_rear_1_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_suspend: cam_sensor_rear_1_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_active: cam_sensor_rear_1_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_suspend: cam_sensor_rear_1_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_active: cam_sensor_front_reset_active {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_suspend: cam_sensor_front_reset_suspend {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_front_avdd_active: cam_sensor_front_avdd_active {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_avdd_suspend: cam_sensor_front_avdd_suspend {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_rear_2_reset_active: cam_sensor_rear_2_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_reset_suspend: cam_sensor_rear_2_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_active: cam_sensor_rear_2_vaf_active {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_suspend: cam_sensor_rear_2_vaf_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_active: cam_sensor_rear_3_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_suspend: cam_sensor_rear_3_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd2_active: cam_sensor_rear_0_avdd2_active {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
drive-strength = <16>; /* 2 MA */
output-high;
bias-pull-up;
};
};
cam_sensor_rear_0_avdd2_suspend: cam_sensor_rear_0_avdd2_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
output-low; /* active low reset */
bias-pull-down;
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_active: cam_sensor_rear_0_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_suspend: cam_sensor_rear_0_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
};

872
arch/arm64/boot/dts/vendor/qcom/camera/kona-oem-camera-instantnoodlep_evb.dtsi vendored Executable file
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@ -0,0 +1,872 @@
&pm8009_gpios{
cam_sensor_pmi_gpio {
cam_sensor_rear_2_dvdd_active: cam_sensor_rear_2_dvdd_active {
pins = "gpio2";
function = "normal";
power-source = <0>;
output-low;
input-disable;
};
cam_sensor_rear_2_dvdd_suspend: cam_sensor_rear_2_dvdd_suspend {
pins = "gpio2";
function = "normal";
power-source = <0>;
bias-pull-down;
input-disable;
};
cam_sensor_rear_2_ana_active: cam_sensor_rear_2_ana_active {
pins = "gpio1";
function = "normal";
power-source = <0>;
output-low;
input-disable;
};
cam_sensor_rear_2_ana_suspend: cam_sensor_rear_2_ana_suspend {
pins = "gpio1";
function = "normal";
power-source = <0>;
bias-pull-down;
input-disable;
};
};
};
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
ois_rear_0: qcom,ois@0{
cell-index = <0>;
reg = <0>;
compatible = "qcom,ois";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
regulator-names ="cam_vio","cam_vdig","cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000>;
rgltr-max-voltage = <0 1104000 2800000>;
rgltr-load-current = <0 1200000 1000000>;
cci-master = <0>;
status = "ok";
ois_gyro,position=<3>;
ois,type=<0>;
ois_gyro,type=<2>;
};
actuator_rear_0: qcom,actuator@0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8009_l5>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <3000000>;
rgltr-load-current = <100000>;
};
actuator_rear_1: qcom,actuator@1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
};
eeprom_rear_0: qcom,eeprom@0 {
cell-index = <0>;
compatible = "qcom,eeprom";
reg = <0x0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vaf-supply = <&pm8009_l5>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2","cam_vaf",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 1800000 2900000 1200000 2800000 0>;
rgltr-max-voltage = <0 1104000 1800000 2900000 1200000 3000000 0>;
rgltr-load-current = <0 1200000 1800000 800000 1200000 1000000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_1: qcom,eeprom@1 {
cell-index = <1>;
compatible = "qcom,eeprom";
reg = <0x1>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000 0>;
rgltr-max-voltage = <0 1104000 2800000 0>;
rgltr-load-current = <0 1104000 80000 0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*wide camera*/
qcom,cam-sensor@0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
reg = <0x0>;
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_0>;
eeprom-src = <&eeprom_rear_0>;
ois-src = <&ois_rear_0>;
led-flash-src = <&led_flash_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 1800000 2900000 1200000 0>;
rgltr-max-voltage = <0 1104000 1800000 2900000 1200000 0>;
rgltr-load-current = <0 1200000 1800000 800000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*tele camera*/
qcom,cam-sensor@1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
reg = <0x1>;
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_1>;
eeprom-src = <&eeprom_rear_1>;
led-flash-src = <&led_flash_rear_aux>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000 0>;
rgltr-max-voltage = <0 1104000 2800000 0>;
rgltr-load-current = <0 1104000 80000 0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&cam_cci1 {
actuator_rear_2: qcom,actuator@2 {
cell-index = <2>;
compatible = "qcom,actuator";
cci-master = <1>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
};
eeprom_front_0: qcom,eeprom@2 {
cell-index = <2>;
compatible = "qcom,eeprom";
reg = <0x02>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1200000 2800000 0>;
rgltr-max-voltage = <0 1200000 2800000 0>;
rgltr-load-current = <0 1200000 80000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_2: qcom,eeprom@3 {
cell-index = <3>;
compatible = "qcom,eeprom";
reg = <0x03>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 3008000 0>;
rgltr-max-voltage = <0 3960000 3960000 0>;
rgltr-load-current = <0 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active
&cam_sensor_rear_2_dvdd_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend
&cam_sensor_rear_2_dvdd_suspend>;
gpios = <&tlmm 98 0>,
<&tlmm 115 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>,
<&pm8009_gpios 2 GPIO_ACTIVE_HIGH>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vdig = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2",
"CAM_VDIG_2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK4_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*front camera*/
qcom,cam-sensor@2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
reg = <0x02>;
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front_0>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1200000 2800000 0>;
rgltr-max-voltage = <0 1200000 2800000 0>;
rgltr-load-current = <0 1200000 80000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 78 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra wide*/
qcom,cam-sensor@3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
reg = <0x03>;
csiphy-sd-index = <4>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
actuator-src = <&actuator_rear_2>;
eeprom-src = <&eeprom_rear_2>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 3008000 0>;
rgltr-max-voltage = <0 3960000 3960000 0>;
rgltr-load-current = <0 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active
&cam_sensor_rear_2_dvdd_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend
&cam_sensor_rear_2_dvdd_suspend>;
gpios = <&tlmm 98 0>,
<&tlmm 115 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>,
<&pm8009_gpios 2 GPIO_ACTIVE_HIGH>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-vdig = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2",
"CAM_VDIG_2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK4_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
//laser start
stmvl53l1: st,stmvl53l1@0 {
compatible = "st,stmvl53l1";
//reg = <0x29>;
laser_vdd-supply = <&pm8009_l7>;
pinctrl-names = "laser_default", "laser_suspend";
pinctrl-0 = <&cam_sensor_laser_xsdn_active
//&cam_sensor_laser_pwren_active
&cam_sensor_laser_intr_active>;
pinctrl-1 = <&cam_sensor_laser_xsdn_suspend
//&cam_sensor_laser_pwren_suspend
&cam_sensor_laser_intr_suspend>;
xsdn-gpio = <&tlmm 76 GPIO_ACTIVE_HIGH>;
//pwren-gpio = <&tlmm 25 0>;
intr-gpio = <&tlmm 11 GPIO_ACTIVE_HIGH>;
interrupt-parent = <&tlmm>;
cci-master = <1>;
status = "ok";
};
//laser end
/*forth_camera*/
qcom,cam-sensor@4 {
cell-index = <4>;
compatible = "qcom,cam-sensor";
reg = <0x4>;
csiphy-sd-index = <3>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
cam_vio-supply = <&pm8009_l7>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1200000 2800000 0>;
rgltr-max-voltage = <0 1200000 2800000 0>;
rgltr-load-current = <100000 1056000 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_3_clock_active
&cam_sensor_rear_3_reset_active>;
pinctrl-1 = <&cam_sensor_rear_3_clock_suspend
&cam_sensor_rear_3_reset_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 116 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAM_MCLK3",
"CAM_RESET3";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&tlmm {
cam_sensor_rear_0_clock_active: cam_sensor_rear_0_clock_active {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_clock_suspend: cam_sensor_rear_0_clock_suspend {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_active: cam_sensor_rear_1_clock_active {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_suspend: cam_sensor_rear_1_clock_suspend {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_active: cam_sensor_front_clock_active {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_suspend: cam_sensor_front_clock_suspend {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_active: cam_sensor_rear_2_clock_active {
/* MCLK4 */
mux {
pins = "gpio98";
function = "cam_mclk";
};
config {
pins = "gpio98";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_suspend: cam_sensor_rear_2_clock_suspend {
/* MCLK4 */
mux {
pins = "gpio98";
function = "cam_mclk";
};
config {
pins = "gpio98";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_clock_active: cam_sensor_rear_3_clock_active {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_clock_suspend: cam_sensor_rear_3_clock_suspend {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_active: cam_sensor_rear_0_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_suspend: cam_sensor_rear_0_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_active: cam_sensor_rear_1_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_suspend: cam_sensor_rear_1_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_active: cam_sensor_front_reset_active {
/* RESET 2 */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_suspend: cam_sensor_front_reset_suspend {
/* RESET 2 */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_rear_2_reset_active: cam_sensor_rear_2_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio115";
function = "gpio";
};
config {
pins = "gpio115";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_reset_suspend: cam_sensor_rear_2_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio115";
function = "gpio";
};
config {
pins = "gpio115";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_active: cam_sensor_rear_3_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_suspend: cam_sensor_rear_3_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_intr_active: cam_sensor_laser_intr_active {
mux {
pins = "gpio11";
function = "gpio";
};
config {
pins = "gpio11";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_intr_suspend: cam_sensor_laser_intr_suspend{
mux {
pins = "gpio11";
function = "gpio";
};
config {
pins = "gpio11";
bias-disable; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_xsdn_active: cam_sensor_laser_xsdn_active {
mux {
pins = "gpio76";
function = "gpio";
};
config {
pins = "gpio76";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_xsdn_suspend: cam_sensor_laser_xsdn_suspend{
mux {
pins = "gpio76";
function = "gpio";
};
config {
pins = "gpio76";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_pwren_active: cam_sensor_laser_pwren_active {
/* RESET, STANDBY */
mux {
pins = "gpio25";
function = "gpio";
};
config {
pins = "gpio25";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_laser_pwren_suspend: cam_sensor_laser_pwren_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio25";
function = "gpio";
};
config {
pins = "gpio25";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
};

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&pm8009_gpios{
cam_sensor_pmi_gpio {
cam_sensor_rear_2_ana_active: cam_sensor_rear_2_ana_active {
pins = "gpio1";
function = "normal";
power-source = <0>;
output-low;
input-disable;
};
cam_sensor_rear_2_ana_suspend: cam_sensor_rear_2_ana_suspend {
pins = "gpio1";
function = "normal";
power-source = <0>;
bias-pull-down;
input-disable;
};
};
};
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_wide: qcom,camera-flash2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear_0: qcom,actuator@0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8009_l5>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <3000000>;
rgltr-load-current = <600000>;
};
ois_rear_0: qcom,ois@0{
cell-index = <0>;
reg = <0>;
compatible = "qcom,ois";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vaf-supply = <&pm8009_l6>;
regulator-names ="cam_vio","cam_vdig","cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000>;
rgltr-max-voltage = <0 1104000 2800000>;
rgltr-load-current = <0 1200000 1200000>;
cci-master = <0>;
status = "ok";
ois_gyro,position=<2>;
ois,type=<0>;
ois_gyro,type=<3>;
ois,name="LC898124";
ois_module,vendor=<0>;
ois_actuator,vednor=<0>;
ois,fw=<1>;
};
eeprom_rear_0: qcom,eeprom@0 {
cell-index = <0>;
compatible = "qcom,eeprom";
reg = <0x0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_1: qcom,eeprom@1 {
cell-index = <1>;
compatible = "qcom,eeprom";
reg = <0x1>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <0 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*wide camera*/
qcom,cam-sensor@0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
reg = <0x0>;
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_0>;
eeprom-src = <&eeprom_rear_0>;
ois-src = <&ois_rear_0>;
led-flash-src = <&led_flash_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_vaf-supply = <&pm8009_l5>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2","cam_vaf",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 2800000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 3000000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra_camera*/
qcom,cam-sensor@3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
reg = <0x3>;
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_1>;
led-flash-src = <&led_flash_rear_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <100000 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&cam_cci1 {
actuator_rear_1: qcom,actuator@0 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_bob>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <3008000>;
rgltr-max-voltage = <3960000>;
rgltr-load-current = <100000>;
/*gpio request at sensor
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 159 0>;
gpio-vaf = <0>;
gpio-req-tbl-num = <0>;
gpio-req-tbl-flags = <0>;
gpio-req-tbl-label = "CAMIF_vaf";*/
};
eeprom_front_0: qcom,eeprom@2 {
cell-index = <2>;
compatible = "qcom,eeprom";
reg = <0x02>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_2: qcom,eeprom@3 {
cell-index = <3>;
compatible = "qcom,eeprom";
reg = <0x03>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*front camera*/
qcom,cam-sensor@2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
reg = <0x02>;
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front_0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra wide*/
qcom,cam-sensor@1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
reg = <0x01>;
csiphy-sd-index = <3>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
actuator-src = <&actuator_rear_1>;
eeprom-src = <&eeprom_rear_2>;
led-flash-src = <&led_flash_rear_aux>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active
&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend
&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>,
<&tlmm 159 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2",
"CAM_VAF";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&tlmm {
cam_sensor_rear_0_clock_active: cam_sensor_rear_0_clock_active {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_clock_suspend: cam_sensor_rear_0_clock_suspend {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_active: cam_sensor_rear_1_clock_active {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_suspend: cam_sensor_rear_1_clock_suspend {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_active: cam_sensor_front_clock_active {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_suspend: cam_sensor_front_clock_suspend {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_active: cam_sensor_rear_2_clock_active {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_suspend: cam_sensor_rear_2_clock_suspend {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_active: cam_sensor_rear_0_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_suspend: cam_sensor_rear_0_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_active: cam_sensor_rear_1_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_suspend: cam_sensor_rear_1_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_active: cam_sensor_rear_1_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_suspend: cam_sensor_rear_1_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_active: cam_sensor_front_reset_active {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_suspend: cam_sensor_front_reset_suspend {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_front_avdd_active: cam_sensor_front_avdd_active {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_avdd_suspend: cam_sensor_front_avdd_suspend {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_rear_2_reset_active: cam_sensor_rear_2_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_reset_suspend: cam_sensor_rear_2_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_active: cam_sensor_rear_2_vaf_active {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_suspend: cam_sensor_rear_2_vaf_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_active: cam_sensor_rear_3_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_suspend: cam_sensor_rear_3_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd2_active: cam_sensor_rear_0_avdd2_active {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
drive-strength = <16>; /* 2 MA */
output-high;
bias-pull-up;
};
};
cam_sensor_rear_0_avdd2_suspend: cam_sensor_rear_0_avdd2_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
output-low; /* active low reset */
bias-pull-down;
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_active: cam_sensor_rear_0_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_suspend: cam_sensor_rear_0_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
};

897
arch/arm64/boot/dts/vendor/qcom/camera/kona-oem-camera-instantnoodlev_evt1.dtsi vendored Executable file
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@ -0,0 +1,897 @@
&pm8009_gpios{
cam_sensor_pmi_gpio {
cam_sensor_rear_2_ana_active: cam_sensor_rear_2_ana_active {
pins = "gpio1";
function = "normal";
power-source = <0>;
output-low;
input-disable;
};
cam_sensor_rear_2_ana_suspend: cam_sensor_rear_2_ana_suspend {
pins = "gpio1";
function = "normal";
power-source = <0>;
bias-pull-down;
input-disable;
};
};
};
&soc {
led_flash_rear: qcom,camera-flash0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
led_flash_rear_wide: qcom,camera-flash2 {
cell-index = <2>;
compatible = "qcom,camera-flash";
flash-source = <&pm8150l_flash0 &pm8150l_flash1>;
torch-source = <&pm8150l_torch0 &pm8150l_torch1>;
switch-source = <&pm8150l_switch2>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear_0: qcom,actuator@0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&pm8009_l5>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <3000000>;
rgltr-load-current = <600000>;
};
ois_rear_0: qcom,ois@0{
cell-index = <0>;
reg = <0>;
compatible = "qcom,ois";
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vaf-supply = <&pm8009_l6>;
regulator-names ="cam_vio","cam_vdig","cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2800000>;
rgltr-max-voltage = <0 1104000 2800000>;
rgltr-load-current = <0 1200000 1200000>;
cci-master = <0>;
status = "ok";
ois_gyro,position=<4>;
ois,type=<0>;
ois_gyro,type=<3>;
ois,name="LC898124";
ois_module,vendor=<0>;
ois_actuator,vednor=<0>;
ois,fw=<1>;
};
eeprom_rear_0: qcom,eeprom@0 {
cell-index = <0>;
compatible = "qcom,eeprom";
reg = <0x0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_1: qcom,eeprom@1 {
cell-index = <1>;
compatible = "qcom,eeprom";
reg = <0x1>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <0 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*wide camera*/
qcom,cam-sensor@0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
reg = <0x0>;
csiphy-sd-index = <0>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_0>;
eeprom-src = <&eeprom_rear_0>;
ois-src = <&ois_rear_0>;
led-flash-src = <&led_flash_rear>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l1>;
cam_vana-supply = <&pm8150_s5>;
cam_v_custom1-supply = <&pm8150a_bob>;
cam_v_custom2-supply = <&pm8009_l2>;
cam_vaf-supply = <&pm8009_l5>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana","cam_v_custom1","cam_v_custom2","cam_vaf",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1104000 2040000 3008000 1100000 2800000 0>;
rgltr-max-voltage = <0 1104000 2040000 3960000 1100000 3000000 0>;
rgltr-load-current = <0 1200000 300000 250000 600000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_0_clock_active
&cam_sensor_rear_0_reset_active
&cam_sensor_rear_0_avdd_active
&cam_sensor_rear_0_avdd2_active>;
pinctrl-1 = <&cam_sensor_rear_0_clock_suspend
&cam_sensor_rear_0_reset_suspend
&cam_sensor_rear_0_avdd_suspend
&cam_sensor_rear_0_avdd2_suspend>;
gpios = <&tlmm 94 0>,
<&tlmm 145 0>,
<&tlmm 26 0>,
<&tlmm 156 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAM_MCLK0",
"CAM_RESET0",
"CAM_VANA",
"CAM_VANA2";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra_camera*/
qcom,cam-sensor@3 {
cell-index = <3>;
compatible = "qcom,cam-sensor";
reg = <0x3>;
csiphy-sd-index = <1>;
sensor-position-roll = <90>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
eeprom-src = <&eeprom_rear_1>;
led-flash-src = <&led_flash_rear_wide>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 0>;
rgltr-max-voltage = <0 3960000 0>;
rgltr-load-current = <100000 800000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_1_clock_active
&cam_sensor_rear_1_reset_active
&cam_sensor_rear_1_avdd_active>;
pinctrl-1 = <&cam_sensor_rear_1_clock_suspend
&cam_sensor_rear_1_reset_suspend
&cam_sensor_rear_1_avdd_suspend>;
gpios = <&tlmm 95 0>,
<&tlmm 144 0>,
<&tlmm 139 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_MCLK1",
"CAM_RESET1",
"CAM_VANA1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&cam_cci1 {
actuator_rear_1: qcom,actuator@0 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&pm8150a_bob>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <3008000>;
rgltr-max-voltage = <3960000>;
rgltr-load-current = <100000>;
/*gpio request at sensor
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 159 0>;
gpio-vaf = <0>;
gpio-req-tbl-num = <0>;
gpio-req-tbl-flags = <0>;
gpio-req-tbl-label = "CAMIF_vaf";*/
};
eeprom_front_0: qcom,eeprom@2 {
cell-index = <2>;
compatible = "qcom,eeprom";
reg = <0x02>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_2: qcom,eeprom@3 {
cell-index = <3>;
compatible = "qcom,eeprom";
reg = <0x03>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*front camera*/
qcom,cam-sensor@2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
reg = <0x02>;
csiphy-sd-index = <2>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front_0>;
cam_vio-supply = <&pm8009_l7>;
cam_vdig-supply = <&pm8009_l3>;
cam_vana-supply = <&pm8150a_bob>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio","cam_vdig","cam_vana",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 1056000 3008000 0>;
rgltr-max-voltage = <0 1056000 3960000 0>;
rgltr-load-current = <0 1200000 250000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_front_clock_active
&cam_sensor_front_reset_active
&cam_sensor_front_avdd_active>;
pinctrl-1 = <&cam_sensor_front_clock_suspend
&cam_sensor_front_reset_suspend
&cam_sensor_front_avdd_suspend>;
gpios = <&tlmm 96 0>,
<&tlmm 90 0>,
<&tlmm 24 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-req-tbl-num = <0 1 2>;
gpio-req-tbl-flags = <1 0 0>;
gpio-req-tbl-label = "CAM_front_MCLK",
"CAM_front_RESET",
"CAM_front_VANA";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*ultra wide*/
qcom,cam-sensor@1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
reg = <0x01>;
csiphy-sd-index = <3>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
actuator-src = <&actuator_rear_1>;
eeprom-src = <&eeprom_rear_2>;
led-flash-src = <&led_flash_rear_aux>;
cam_vio-supply = <&pm8009_l7>;
cam_vana-supply = <&pm8150a_bob>;
cam_vdig-supply = <&pm8009_l4>;
cam_clk-supply = <&titan_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
rgltr-min-voltage = <0 3008000 1056000 0>;
rgltr-max-voltage = <0 3960000 1056000 0>;
rgltr-load-current = <0 250000 600000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_rear_2_clock_active
&cam_sensor_rear_2_reset_active
&cam_sensor_rear_2_ana_active
&cam_sensor_rear_2_vaf_active>;
pinctrl-1 = <&cam_sensor_rear_2_clock_suspend
&cam_sensor_rear_2_reset_suspend
&cam_sensor_rear_2_ana_suspend
&cam_sensor_rear_2_vaf_suspend>;
gpios = <&tlmm 97 0>,
<&tlmm 78 0>,
<&pm8009_gpios 1 GPIO_ACTIVE_HIGH>,
<&tlmm 159 0>;
use-shared-clk;
gpio-reset = <1>;
gpio-vana = <2>;
gpio-custom1 = <3>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 0 0 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_VANA_2",
"CAM_VAF";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
};
&tlmm {
cam_sensor_rear_0_clock_active: cam_sensor_rear_0_clock_active {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_clock_suspend: cam_sensor_rear_0_clock_suspend {
/* MCLK0 */
mux {
pins = "gpio94";
function = "cam_mclk";
};
config {
pins = "gpio94";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_active: cam_sensor_rear_1_clock_active {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_clock_suspend: cam_sensor_rear_1_clock_suspend {
/* MCLK1 */
mux {
pins = "gpio95";
function = "cam_mclk";
};
config {
pins = "gpio95";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_active: cam_sensor_front_clock_active {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_clock_suspend: cam_sensor_front_clock_suspend {
/* MCLK2 */
mux {
pins = "gpio96";
function = "cam_mclk";
};
config {
pins = "gpio96";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_active: cam_sensor_rear_2_clock_active {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_clock_suspend: cam_sensor_rear_2_clock_suspend {
/* MCLK4 */
mux {
pins = "gpio97";
function = "cam_mclk";
};
config {
pins = "gpio97";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_active: cam_sensor_rear_0_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_reset_suspend: cam_sensor_rear_0_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio145";
function = "gpio";
};
config {
pins = "gpio145";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_active: cam_sensor_rear_1_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_reset_suspend: cam_sensor_rear_1_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio144";
function = "gpio";
};
config {
pins = "gpio144";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_active: cam_sensor_rear_1_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_1_avdd_suspend: cam_sensor_rear_1_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio139";
function = "gpio";
};
config {
pins = "gpio139";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_active: cam_sensor_front_reset_active {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_reset_suspend: cam_sensor_front_reset_suspend {
/* RESET 2 */
mux {
pins = "gpio90";
function = "gpio";
};
config {
pins = "gpio90";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_front_avdd_active: cam_sensor_front_avdd_active {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_front_avdd_suspend: cam_sensor_front_avdd_suspend {
/* RESET 2 */
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_sensor_rear_2_reset_active: cam_sensor_rear_2_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_reset_suspend: cam_sensor_rear_2_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio78";
function = "gpio";
};
config {
pins = "gpio78";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_active: cam_sensor_rear_2_vaf_active {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_2_vaf_suspend: cam_sensor_rear_2_vaf_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio159";
function = "gpio";
};
config {
pins = "gpio159";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_active: cam_sensor_rear_3_reset_active {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_3_reset_suspend: cam_sensor_rear_3_reset_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio116";
function = "gpio";
};
config {
pins = "gpio116";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd2_active: cam_sensor_rear_0_avdd2_active {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
drive-strength = <16>; /* 2 MA */
output-high;
bias-pull-up;
};
};
cam_sensor_rear_0_avdd2_suspend: cam_sensor_rear_0_avdd2_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio156";
function = "gpio";
};
config {
pins = "gpio156";
output-low; /* active low reset */
bias-pull-down;
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_active: cam_sensor_rear_0_avdd_active {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_sensor_rear_0_avdd_suspend: cam_sensor_rear_0_avdd_suspend {
/* RESET, STANDBY */
mux {
pins = "gpio26";
function = "gpio";
};
config {
pins = "gpio26";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
};

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arch/arm64/boot/dts/vendor/qcom/camera/scuba-camera-sensor-idp.dtsi vendored Executable file
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#include <dt-bindings/clock/qcom,gcc-scuba.h>
&soc {
led_flash_rear: qcom,camera-flash@0 {
cell-index = <0>;
compatible = "qcom,camera-flash";
flash-source = <&pm2250_flash0>;
torch-source = <&pm2250_torch0>;
switch-source = <&pm2250_switch0>;
status = "ok";
};
led_flash_rear_aux: qcom,camera-flash@1 {
cell-index = <1>;
compatible = "qcom,camera-flash";
flash-source = <&pm2250_flash0>;
torch-source = <&pm2250_torch0>;
switch-source = <&pm2250_switch0>;
status = "ok";
};
qcom,cam-res-mgr {
compatible = "qcom,cam-res-mgr";
status = "ok";
};
};
&cam_cci0 {
actuator_rear: qcom,actuator0 {
cell-index = <0>;
compatible = "qcom,actuator";
cci-master = <0>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
actuator_rear_aux: qcom,actuator1 {
cell-index = <1>;
compatible = "qcom,actuator";
cci-master = <1>;
cam_vaf-supply = <&L5P>;
regulator-names = "cam_vaf";
rgltr-cntrl-support;
rgltr-min-voltage = <2800000>;
rgltr-max-voltage = <2800000>;
rgltr-load-current = <100000>;
status = "ok";
};
eeprom_rear: qcom,eeprom0 {
cell-index = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1050000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_rear_aux: qcom,eeprom1 {
cell-index = <1>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_vaf-supply = <&L5P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk", "cam_vaf";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-max-voltage = <1800000 2800000 1200000 0 2800000>;
rgltr-load-current = <120000 80000 1200000 0 100000>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend>;
gpios = <&tlmm 21 0>,
<&tlmm 19 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
eeprom_front: qcom,eeprom2 {
cell-index = <2>;
compatible = "qcom,eeprom";
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
/* Rear*/
qcom,cam-sensor0 {
cell-index = <0>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <0>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear>;
led-flash-src = <&led_flash_rear>;
eeprom-src = <&eeprom_rear>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L4P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1050000 0>;
rgltr-max-voltage = <1800000 2800000 1050000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear0_reset_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear0_reset_suspend>;
gpios = <&tlmm 20 0>,
<&tlmm 18 0>;
gpio-reset = <1>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0";
sensor-mode = <0>;
cci-master = <0>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Rear Aux*/
qcom,cam-sensor1 {
cell-index = <1>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <180>;
actuator-src = <&actuator_rear_aux>;
led-flash-src = <&led_flash_rear_aux>;
eeprom-src = <&eeprom_rear_aux>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L3P>;
cam_vdig-supply = <&L1P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1200000 0>;
rgltr-max-voltage = <1800000 2800000 1200000 0>;
rgltr-load-current = <120000 80000 1200000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk1_active
&cam_sensor_rear1_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk1_suspend
&cam_sensor_rear1_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 21 0>,
<&tlmm 19 0>,
<&tlmm 113 0>,
<&tlmm 114 0>;
gpio-reset = <1>;
gpio-custom1 = <2>;
gpio-custom2 = <3>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK1",
"CAM_RESET1",
"CAM_CSIMUX_OE0",
"CAM_CSIMUX_SEL0";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <19200000>;
};
/*Front*/
qcom,cam-sensor2 {
cell-index = <2>;
compatible = "qcom,cam-sensor";
csiphy-sd-index = <1>;
sensor-position-roll = <270>;
sensor-position-pitch = <0>;
sensor-position-yaw = <0>;
eeprom-src = <&eeprom_front>;
cam_vio-supply = <&L7P>;
cam_vana-supply = <&L6P>;
cam_vdig-supply = <&L2P>;
cam_clk-supply = <&gcc_camss_top_gdsc>;
regulator-names = "cam_vio", "cam_vana", "cam_vdig",
"cam_clk";
rgltr-cntrl-support;
pwm-switch;
rgltr-min-voltage = <1800000 2800000 1056000 0>;
rgltr-max-voltage = <1800000 2800000 1056000 0>;
rgltr-load-current = <0 80000 105000 0>;
gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk2_active
&cam_sensor_front0_reset_active
&cam_sensor_csi_mux_oe_active
&cam_sensor_csi_mux_sel_active>;
pinctrl-1 = <&cam_sensor_mclk2_suspend
&cam_sensor_front0_reset_suspend
&cam_sensor_csi_mux_oe_suspend
&cam_sensor_csi_mux_sel_suspend>;
gpios = <&tlmm 27 0>,
<&tlmm 24 0>,
<&tlmm 113 0>,
<&tlmm 114 0>;
gpio-reset = <1>;
gpio-custom1 = <2>;
gpio-custom2 = <3>;
gpio-req-tbl-num = <0 1>;
gpio-req-tbl-flags = <1 0>;
gpio-req-tbl-label = "CAMIF_MCLK2",
"CAM_RESET2",
"CAM_CSIMUX_OE0",
"CAM_CSIMUX_SEL0";
sensor-mode = <0>;
cci-master = <1>;
status = "ok";
clocks = <&gcc GCC_CAMSS_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "turbo";
clock-rates = <24000000>;
};
};

762
arch/arm64/boot/dts/vendor/qcom/camera/scuba-camera.dtsi vendored Executable file
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#include <dt-bindings/msm/msm-camera.h>
&soc {
qcom,cam-req-mgr {
compatible = "qcom,cam-req-mgr";
status = "ok";
};
cam_csiphy0: qcom,csiphy0 {
cell-index = <0>;
compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
reg = <0x05C52000 0x1000>;
reg-names = "csiphy";
reg-cam-base = <0x52000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr";
gdscr-supply = <&gcc_camss_top_gdsc>;
csi-vdd-voltage = <1200000>;
mipi-csi-vdd-supply = <&L5A>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_0_CLK>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy0_clk",
"csi0phytimer_clk_src",
"csi0phytimer_clk";
src-clock-name = "csi0phytimer_clk_src";
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
clock-rates =
<19200000 0 19200000 0>,
<341330000 0 200000000 0>,
<341330000 0 200000000 0>,
<384000000 0 268800000 0>;
status = "ok";
};
cam_csiphy1: qcom,csiphy1 {
cell-index = <1>;
compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
reg = <0x05C53000 0x1000>;
reg-names = "csiphy";
reg-cam-base = <0x53000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "csiphy";
regulator-names = "gdscr";
gdscr-supply = <&gcc_camss_top_gdsc>;
csi-vdd-voltage = <1200000>;
mipi-csi-vdd-supply = <&L5A>;
clocks = <&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_CPHY_1_CLK>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK_SRC>,
<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>;
clock-names = "cphy_rx_clk_src",
"csiphy1_clk",
"csi1phytimer_clk_src",
"csi1phytimer_clk";
src-clock-name = "csi1phytimer_clk_src";
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
clock-rates =
<19200000 0 19200000 0>,
<341330000 0 200000000 0>,
<341330000 0 200000000 0>,
<384000000 0 268800000 0>;
status = "ok";
};
cam_cci0: qcom,cci0 {
cell-index = <0>;
compatible = "qcom,cci";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x05C1B000 0x1000>;
reg-names = "cci";
reg-cam-base = <0x1B000>;
interrupt-names = "cci";
interrupts = <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>;
status = "ok";
gdscr-supply = <&gcc_camss_top_gdsc>;
regulator-names = "gdscr";
clocks = <&gcc GCC_CAMSS_CCI_0_CLK>,
<&gcc GCC_CAMSS_CCI_CLK_SRC>;
clock-names = "cci_0_clk",
"cci_0_clk_src";
src-clock-name = "cci_0_clk_src";
clock-cntl-level = "svs";
clock-rates = <0 37500000>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cci0_active &cci1_active>;
pinctrl-1 = <&cci0_suspend &cci1_suspend>;
gpios = <&tlmm 22 0>,
<&tlmm 23 0>,
<&tlmm 29 0>,
<&tlmm 30 0>;
gpio-req-tbl-num = <0 1 2 3>;
gpio-req-tbl-flags = <1 1 1 1>;
gpio-req-tbl-label = "CCI_I2C_DATA0",
"CCI_I2C_CLK0",
"CCI_I2C_DATA1",
"CCI_I2C_CLK1";
i2c_freq_100Khz_cci0: qcom,i2c_standard_mode {
hw-thigh = <201>;
hw-tlow = <174>;
hw-tsu-sto = <204>;
hw-tsu-sta = <231>;
hw-thd-dat = <22>;
hw-thd-sta = <162>;
hw-tbuf = <227>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_400Khz_cci0: qcom,i2c_fast_mode {
hw-thigh = <38>;
hw-tlow = <56>;
hw-tsu-sto = <40>;
hw-tsu-sta = <40>;
hw-thd-dat = <22>;
hw-thd-sta = <35>;
hw-tbuf = <62>;
hw-scl-stretch-en = <0>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_custom_cci0: qcom,i2c_custom_mode {
hw-thigh = <38>;
hw-tlow = <56>;
hw-tsu-sto = <40>;
hw-tsu-sta = <40>;
hw-thd-dat = <22>;
hw-thd-sta = <35>;
hw-tbuf = <62>;
hw-scl-stretch-en = <1>;
hw-trdhld = <6>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode {
hw-thigh = <16>;
hw-tlow = <22>;
hw-tsu-sto = <17>;
hw-tsu-sta = <18>;
hw-thd-dat = <16>;
hw-thd-sta = <15>;
hw-tbuf = <24>;
hw-scl-stretch-en = <0>;
hw-trdhld = <3>;
hw-tsp = <3>;
cci-clk-src = <37500000>;
status = "ok";
};
};
qcom,cam_smmu {
compatible = "qcom,msm-cam-smmu";
status = "ok";
msm_cam_smmu_tfe {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x400 0x000>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
label = "tfe";
tfe_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_ope {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x820 0x000>,
<&apps_smmu 0x840 0x000>;
qcom,iommu-faults = "non-fatal";
multiple-client-devices;
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
label = "ope", "ope-cdm0";
ope_iova_mem_map: iova-mem-map {
/* IO region is approximately 3.4 GB */
iova-mem-region-io {
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_cpas_cdm {
compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x800 0x000>;
label = "cpas-cdm0";
qcom,iommu-faults = "non-fatal";
qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
cpas_cdm_iova_mem_map: iova-mem-map {
iova-mem-region-io {
/* IO region is approximately 3.4 GB */
iova-region-name = "io";
iova-region-start = <0x7400000>;
iova-region-len = <0xd8c00000>;
iova-region-id = <0x3>;
status = "ok";
};
};
};
msm_cam_smmu_secure {
compatible = "qcom,msm-cam-smmu-cb";
label = "cam-secure";
qcom,secure-cb;
};
};
qcom,cam-cpas@5c11000 {
cell-index = <0>;
compatible = "qcom,cam-cpas";
label = "cpas";
arch-compat = "cpas_top";
status = "ok";
reg-names = "cam_cpas_top", "cam_camnoc";
reg = <0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x11000 0x13000>;
cam_hw_fuse = <CAM_CPAS_SECURE_CAMERA_ENABLE 0x01B401E4 8>;
interrupt-names = "cpas_camnoc";
interrupts = <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>;
camnoc-axi-min-ib-bw = <3000000000>; /*Need to be verified*/
regulator-names = "camss-vdd";
camss-vdd-supply = <&gcc_camss_top_gdsc>;
clock-names =
"gcc_camss_ahb_clk",
"gcc_camss_top_ahb_clk",
"gcc_camss_top_ahb_clk_src",
"gcc_camss_axi_clk",
"gcc_camss_axi_clk_src",
"gcc_camss_nrt_axi_clk",
"gcc_camss_rt_axi_clk";
clocks =
<&gcc GCC_CAMERA_AHB_CLK>,
<&gcc GCC_CAMSS_TOP_AHB_CLK>,
<&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>,
<&gcc GCC_CAMSS_AXI_CLK>,
<&gcc GCC_CAMSS_AXI_CLK_SRC>,
<&gcc GCC_CAMSS_NRT_AXI_CLK>,
<&gcc GCC_CAMSS_RT_AXI_CLK>;
src-clock-name = "gcc_camss_axi_clk_src";
clock-rates =
<0 0 0 0 0 0 0>,
<0 0 80000000 0 19200000 0 0>,
<0 0 80000000 0 150000000 0 0>,
<0 0 80000000 0 200000000 0 0>,
<0 0 80000000 0 300000000 0 0>,
<0 0 80000000 0 300000000 0 0>,
<0 0 80000000 0 300000000 0 0>;
clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs",
"svs_l1", "nominal", "turbo";
control-camnoc-axi-clk;
camnoc-bus-width = <32>;
camnoc-axi-clk-bw-margin-perc = <20>;
qcom,msm-bus,name = "cam_ahb";
qcom,msm-bus,num-cases = <7>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 133333>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 133333>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,
<MSM_BUS_MASTER_AMPSS_M0
MSM_BUS_SLAVE_CAMERA_CFG 0 300000>;
vdd-corners = <RPMH_REGULATOR_LEVEL_RETENTION
RPMH_REGULATOR_LEVEL_MIN_SVS
RPMH_REGULATOR_LEVEL_LOW_SVS
RPMH_REGULATOR_LEVEL_SVS
RPMH_REGULATOR_LEVEL_SVS_L1
RPMH_REGULATOR_LEVEL_NOM
RPMH_REGULATOR_LEVEL_NOM_L1
RPMH_REGULATOR_LEVEL_NOM_L2
RPMH_REGULATOR_LEVEL_TURBO
RPMH_REGULATOR_LEVEL_TURBO_L1>;
vdd-corner-ahb-mapping = "suspend", "minsvs",
"lowsvs", "svs", "svs_l1",
"nominal", "nominal", "nominal",
"turbo", "turbo";
client-id-based;
client-names =
"csiphy0", "csiphy1", "cci0",
"csid0", "csid1", "tfe0",
"tfe1", "ope0", "cam-cdm-intf0",
"cpas-cdm0", "ope-cdm0", "tpg0", "tpg1";
camera-bus-nodes {
level2-nodes {
level-index = <2>;
level2_rt0_rd_wr_sum: level2-rt0-rd-wr-sum {
cell-index = <0>;
node-name = "level2-rt0-rd-wr-sum";
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
qcom,axi-port-name = "cam_hf_0";
ib-bw-voting-needed;
qcom,axi-port-mnoc {
qcom,msm-bus,name =
"cam_hf_0_mnoc";
qcom,msm-bus-vector-dyn-vote;
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_CAMNOC_HF
MSM_BUS_SLAVE_EBI_CH0 0 0>;
};
};
level2_nrt0_rd_wr_sum: level2-nrt0-rd-wr-sum {
cell-index = <1>;
node-name = "level2-nrt0-rd-wr-sum";
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM>;
qcom,axi-port-name = "cam_sf_0";
qcom,axi-port-mnoc {
qcom,msm-bus,name =
"cam_sf_0_mnoc";
qcom,msm-bus-vector-dyn-vote;
qcom,msm-bus,num-cases = <2>;
qcom,msm-bus,num-paths = <1>;
qcom,msm-bus,vectors-KBps =
<MSM_BUS_MASTER_CAMNOC_SF
MSM_BUS_SLAVE_EBI_CH0 0 0>,
<MSM_BUS_MASTER_CAMNOC_SF
MSM_BUS_SLAVE_EBI_CH0 0 0>;
};
};
};
level1-nodes {
level-index = <1>;
camnoc-max-needed;
level1_rt0_wr: level1-rt0-wr {
cell-index = <2>;
node-name = "level1-rt0-wr";
parent-node = <&level2_rt0_rd_wr_sum>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE>;
};
level1_nrt0_rd_wr: level1-nrt0-rd-wr {
cell-index = <3>;
node-name = "level1-nrt0-rd-wr";
parent-node = <&level2_nrt0_rd_wr_sum>;
traffic-merge-type =
<CAM_CPAS_TRAFFIC_MERGE_SUM_INTERLEAVE>;
};
};
level0-nodes {
level-index = <0>;
ope0_all_wr: ope0-all-wr {
cell-index = <4>;
node-name = "ope0-all-wr";
client-name = "ope0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_OPE_WR_VID
CAM_CPAS_PATH_DATA_OPE_WR_DISP
CAM_CPAS_PATH_DATA_OPE_WR_REF>;
parent-node = <&level1_nrt0_rd_wr>;
};
ope0_all_rd: ope0-all-rd {
cell-index = <5>;
node-name = "ope0-all-rd";
client-name = "ope0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
constituent-paths =
<CAM_CPAS_PATH_DATA_OPE_RD_IN
CAM_CPAS_PATH_DATA_OPE_RD_REF>;
parent-node = <&level1_nrt0_rd_wr>;
};
tfe0_all_wr: tfe0-all-wr {
cell-index = <6>;
node-name = "tfe0-all-wr";
client-name = "tfe0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_RDI0
CAM_CPAS_PATH_DATA_IFE_RDI1
CAM_CPAS_PATH_DATA_IFE_RDI2
CAM_CPAS_PATH_DATA_IFE_RDI3
CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr>;
};
tfe1_all_wr: tfe1-all-wr {
cell-index = <7>;
node-name = "tfe1-all-wr";
client-name = "tfe1";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_WRITE>;
constituent-paths =
<CAM_CPAS_PATH_DATA_IFE_RDI0
CAM_CPAS_PATH_DATA_IFE_RDI1
CAM_CPAS_PATH_DATA_IFE_RDI2
CAM_CPAS_PATH_DATA_IFE_RDI3
CAM_CPAS_PATH_DATA_IFE_VID
CAM_CPAS_PATH_DATA_IFE_DISP
CAM_CPAS_PATH_DATA_IFE_STATS>;
parent-node = <&level1_rt0_wr>;
};
cpas_cdm0_all_rd: cpas-cdm0-all-rd {
cell-index = <9>;
node-name = "cpas-cdm0-all-rd";
client-name = "cpas-cdm0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
parent-node = <&level1_nrt0_rd_wr>;
};
ope_cdm0_all_rd: ope-cdm0-all-rd {
cell-index = <10>;
node-name = "ope-cdm0-all-rd";
client-name = "ope-cdm0";
traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
traffic-transaction-type =
<CAM_CPAS_TRANSACTION_READ>;
parent-node = <&level1_nrt0_rd_wr>;
};
};
};
};
qcom,cam-cdm-intf {
compatible = "qcom,cam-cdm-intf";
cell-index = <0>;
label = "cam-cdm-intf";
num-hw-cdm = <2>;
cdm-client-names = "vfe";
status = "ok";
};
cam_cpas_cdm: qcom,cpas-cdm0@5c23000 {
cell-index = <0>;
compatible = "qcom,cam-cpas-cdm2_0";
label = "cpas-cdm";
reg = <0x5c23000 0x400>;
reg-names = "cpas-cdm0";
reg-cam-base = <0x23000>;
interrupts = <GIC_SPI 207 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "cpas-cdm0";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names = "cam_cc_cpas_top_ahb_clk";
clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>;
clock-rates = <0>;
clock-cntl-level = "svs";
cdm-client-names = "tfe0", "tfe1";
config-fifo;
fifo-depths = <64 64 64 64>;
status = "ok";
};
cam_ope_cdm: qcom,ope-cdm0@5c42000 {
cell-index = <0>;
compatible = "qcom,cam-ope-cdm2_0";
label = "ope-cdm";
reg = <0x5c42000 0x400>;
reg-names = "ope-cdm0";
reg-cam-base = <0x42000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ope-cdm0";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"ope_ahb_clk",
"ope_clk_src",
"ope_clk";
clocks =
<&gcc GCC_CAMSS_OPE_AHB_CLK>,
<&gcc GCC_CAMSS_OPE_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_CLK>;
clock-rates = <0 0 0>,
<0 0 0>,
<0 0 0>,
<0 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
cdm-client-names = "ope";
config-fifo;
fifo-depths = <64 64 64 64>;
status = "ok";
};
qcom,cam-isp {
compatible = "qcom,cam-isp";
arch-compat = "tfe";
status = "ok";
};
cam_tfe_csid0: qcom,tfe_csid0@5c6e000 {
cell-index = <0>;
compatible = "qcom,csid530";
reg-names = "csid", "top", "camnoc";
reg = <0x5c6e000 0x1000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x6e000 0x11000 0x13000>;
interrupt-names = "csid0";
interrupts = <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>;
clock-rates =
<240000000 0 240000000 0 256000000 0>,
<384000000 0 341333333 0 460800000 0>,
<426400000 0 384000000 0 576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe0: qcom,tfe0@5c6e000 {
cell-index = <0>;
compatible = "qcom,tfe530";
reg-names = "tfe0";
reg = <0x5c6e000 0x5000>;
reg-cam-base = <0x6e000>;
interrupt-names = "tfe0";
interrupts = <GIC_SPI 211 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk";
clocks =
<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CLK>;
clock-rates =
<256000000 0>,
<460800000 0>,
<576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe_csid1: qcom,tfe_csid1@5c75000 {
cell-index = <1>;
compatible = "qcom,csid530";
reg-names = "csid", "top", "camnoc";
reg = <0x5c75000 0x1000>,
<0x5c11000 0x1000>,
<0x5c13000 0x4000>;
reg-cam-base = <0x75000 0x11000 0x13000>;
interrupt-names = "csid1";
interrupts = <GIC_SPI 212 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_csid_clk_src",
"tfe_csid_clk",
"cphy_rx_clk_src",
"tfe_cphy_rx_clk",
"tfe_clk_src",
"tfe_clk";
clocks =
<&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CLK>;
clock-rates =
<240000000 0 240000000 0 256000000 0>,
<384000000 0 341333333 0 460800000 0>,
<426400000 0 384000000 0 576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_csid_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe1: qcom,tfe1@5c75000 {
cell-index = <1>;
compatible = "qcom,tfe530";
reg-names = "tfe1";
reg = <0x5c75000 0x5000>;
reg-cam-base = <0x75000>;
interrupt-names = "tfe1";
interrupts = <GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"tfe_clk_src",
"tfe_clk";
clocks =
<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CLK>;
clock-rates =
<256000000 0>,
<460800000 0>,
<576000000 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "tfe_clk_src";
clock-control-debugfs = "true";
status = "ok";
};
cam_tfe_tpg0: qcom,tpg0@5c66000 {
cell-index = <0>;
compatible = "qcom,tpgv1";
reg-names = "tpg0", "top";
reg = <0x5c66000 0x400>,
<0x5c11000 0x1000>;
reg-cam-base = <0x66000 0x11000>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"cphy_rx_clk_src",
"tfe_0_cphy_rx_clk",
"gcc_camss_cphy_0_clk";
clocks =
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_CPHY_0_CLK>;
clock-rates =
<240000000 0 0>,
<341333333 0 0>,
<384000000 0 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "cphy_rx_clk_src";
clock-control-debugfs = "false";
status = "ok";
};
cam_tfe_tpg1: qcom,tpg0@5c68000 {
cell-index = <1>;
compatible = "qcom,tpgv1";
reg-names = "tpg0", "top";
reg = <0x5c68000 0x400>,
<0x5c11000 0x1000>;
reg-cam-base = <0x68000 0x11000>;
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"cphy_rx_clk_src",
"tfe_1_cphy_rx_clk",
"gcc_camss_cphy_1_clk";
clocks =
<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
<&gcc GCC_CAMSS_CPHY_1_CLK>;
clock-rates =
<240000000 0 0>,
<341333333 0 0>,
<384000000 0 0>;
clock-cntl-level = "svs", "svs_l1", "turbo";
src-clock-name = "cphy_rx_clk_src";
clock-control-debugfs = "false";
status = "ok";
};
qcom,cam-ope {
compatible = "qcom,cam-ope";
compat-hw-name = "qcom,ope";
num-ope = <1>;
status = "ok";
};
ope: qcom,ope@0x5c42000 {
cell-index = <0>;
compatible = "qcom,ope";
reg =
<0x5c42000 0x400>,
<0x5c42400 0x200>,
<0x5c42600 0x200>,
<0x5c42800 0x4400>,
<0x5c46c00 0x190>,
<0x5c46d90 0xA00>;
reg-names =
"ope_cdm",
"ope_top",
"ope_qos",
"ope_pp",
"ope_bus_rd",
"ope_bus_wr";
reg-cam-base = <0x42000 0x42400 0x42600 0x42800 0x46c00 0x46d90>;
interrupts = <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ope";
regulator-names = "camss";
camss-supply = <&gcc_camss_top_gdsc>;
clock-names =
"ope_ahb_clk_src",
"ope_ahb_clk",
"ope_clk_src",
"ope_clk";
clocks =
<&gcc GCC_CAMSS_OPE_AHB_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_AHB_CLK>,
<&gcc GCC_CAMSS_OPE_CLK_SRC>,
<&gcc GCC_CAMSS_OPE_CLK>;
clock-rates =
<171428571 0 200000000 0>,
<171428571 0 266600000 0>,
<240000000 0 465000000 0>,
<240000000 0 580000000 0>;
clock-cntl-level = "svs", "svs_l1", "nominal", "turbo";
src-clock-name = "ope_clk_src";
status = "ok";
};
};

46
arch/arm64/boot/dts/vendor/qcom/display/dsi-panel-ext-bridge-1080p.dtsi vendored Executable file
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@ -0,0 +1,46 @@
&mdss_mdp {
dsi_ext_bridge_1080p: qcom,mdss_dsi_ext_bridge_1080p {
qcom,mdss-dsi-panel-name = "ext video mode dsi bridge";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-t-clk-post = <0x03>;
qcom,mdss-dsi-t-clk-pre = <0x24>;
qcom,mdss-dsi-force-clock-lane-hs;
qcom,mdss-dsi-ext-bridge-mode;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-width = <1920>;
qcom,mdss-dsi-panel-height = <1080>;
qcom,mdss-dsi-h-front-porch = <88>;
qcom,mdss-dsi-h-back-porch = <148>;
qcom,mdss-dsi-h-pulse-width = <44>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <36>;
qcom,mdss-dsi-v-front-porch = <4>;
qcom,mdss-dsi-v-pulse-width = <5>;
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
};
};
};

151
arch/arm64/boot/dts/vendor/qcom/display/dsi-panel-hx83112a-truly-singlemipi-fhd-video.dtsi vendored Executable file
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@ -0,0 +1,151 @@
&mdss_mdp {
dsi_hx83112a_truly_video: qcom,mdss_dsi_hx83112a_truly_video {
qcom,mdss-dsi-panel-name =
"hx83112a video mode dsi truly panel";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-lane-map = "lane_map_0123";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-tx-eot-append;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-lp11-init;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-pan-physical-width-dimension = <65>;
qcom,mdss-pan-physical-height-dimension = <129>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <2160>;
qcom,mdss-dsi-h-front-porch = <42>;
qcom,mdss-dsi-h-back-porch = <42>;
qcom,mdss-dsi-h-pulse-width = <10>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <15>;
qcom,mdss-dsi-v-front-porch = <10>;
qcom,mdss-dsi-v-pulse-width = <3>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-on-command = [
39 01 00 00 00 00 04 B9 83 11 2A
39 01 00 00 00 00 09 B1 08 29 29 00 00 4F 54
33
39 01 00 00 00 00 11 B2 00 02 00 80 70 00 08
26 FC 01 00 03 15 A3 87 09
39 01 00 00 00 00 02 BD 02
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 03 D2 2C 2C
39 01 00 00 00 00 1C B4 01 CE 01 CE 01 CE 0A
CE 0A CE 0A CE 00 FF 00 FF 00 00 22 23 00
28 0A 13 14 00 8A
39 01 00 00 00 00 02 BD 02
39 01 00 00 00 00 0A B4 00 92 12 22 88 12 12
00 53
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 04 B6 82 82 E3
39 01 00 00 00 00 02 CC 08
39 01 00 00 00 00 2B D3 40 00 00 00 00 01 01
0A 0A 07 07 00 08 09 09 09 09 32 10 09 00
09 32 21 0A 00 0A 32 10 08 00 00 00 00 00
00 00 00 00 0B 08 82
39 01 00 00 00 00 02 BD 01
39 01 00 00 00 00 09 D3 00 00 19 00 00 0A 00
81
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 31 D5 18 18 18 18 18 18 18
18 31 31 30 30 2F 2F 31 31 30 30 2F 2F C0
18 40 40 01 00 07 06 05 04 03 02 21 20 18
18 19 19 18 18 03 03 18 18 18 18 18 18
39 01 00 00 00 00 31 D6 18 18 18 18 18 18 18
18 31 31 30 30 2F 2F 31 31 30 30 2F 2F C0
18 40 40 02 03 04 05 06 07 00 01 20 21 18
18 18 18 19 19 20 20 18 18 18 18 18 18
39 01 00 00 00 00 19 D8 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00
39 01 00 00 00 00 02 BD 01
39 01 00 00 00 00 19 D8 AA AA AA AA AA AA AA
AA AA AA AA AA AA AA AA AA AA AA AA AA AA
AA AA AA
39 01 00 00 00 00 02 BD 02
39 01 00 00 00 00 0D D8 AF FF FA AA BA AA AA
FF FA AA BA AA
39 01 00 00 00 00 02 BD 03
39 01 00 00 00 00 19 D8 AA AA AA AA AA AA AA
AA AA AA AA AA AA AA AA AA AA AA AA AA AA
AA AA AA
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 18 E7 0E 0E 1E 6A 1D 6A 00
32 02 02 00 00 02 02 02 05 14 14 32 B9 23
B9 08
39 01 00 00 00 00 02 BD 01
39 01 00 00 00 00 0A E7 02 00 98 01 9A 0D A8
0E 01
39 01 00 00 00 00 02 BD 02
39 01 00 00 00 00 1E E7 00 00 08 00 01 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 04 00 00 00 00 02 00
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 02 C1 01
39 01 00 00 00 00 02 BD 01
39 01 00 00 00 00 3A C1 FF F7 F0 E9 E2 DB D4
C6 BF B8 B1 AB A5 9F 99 94 8E 8A 85 7C 74
6C 65 5F 58 52 4B 47 42 3C 37 31 2C 27 22
1C 18 12 0D 08 05 04 02 01 00 27 B9 BE 54
C6 B8 9C 37 43 3D E5 00
39 01 00 00 00 00 02 BD 02
39 01 00 00 00 00 3A C1 FF F7 F0 E9 E2 DB D4
C6 BF B8 B1 AB A5 9F 99 94 8E 8A 85 7C 74
6C 65 5F 58 52 4B 47 42 3C 37 31 2C 27 22
1C 18 12 0D 08 05 04 02 01 00 27 B9 BE 54
C6 B8 9C 37 43 3D E5 00
39 01 00 00 00 00 02 BD 03
39 01 00 00 00 00 3A C1 FF F7 F0 E9 E2 DB D4
C6 BF B8 B1 AB A5 9F 99 94 8E 8A 85 7C 74
6C 65 5F 58 52 4B 47 42 3C 37 31 2C 27 22
1C 18 12 0D 08 05 04 02 01 00 27 B9 BE 54
C6 B8 9C 37 43 3D E5 00
39 01 00 00 00 00 02 BD 00
39 01 00 00 00 00 02 E9 C3
39 01 00 00 00 00 03 CB 92 01
39 01 00 00 00 00 02 E9 3F
39 01 00 00 00 00 07 C7 70 00 04 E0 33 00
39 01 00 00 00 00 03 51 0F FF
39 01 00 00 00 00 02 53 24
39 01 00 00 00 00 02 55 00
15 01 00 00 00 00 02 35 00
05 01 00 00 96 00 02 11 00
05 01 00 00 32 00 02 29 00];
qcom,mdss-dsi-off-command = [
05 01 00 00 32 00 02 28 00
05 01 00 00 96 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
};
};
};
};

87
arch/arm64/boot/dts/vendor/qcom/display/dsi-panel-hx8394d-720p-video.dtsi vendored Executable file
View File

@ -0,0 +1,87 @@
&mdss_mdp {
dsi_hx8394d_720_vid: qcom,mdss_dsi_hx8394d_720p_video {
qcom,mdss-dsi-panel-name = "hx8394d 720p video mode dsi panel";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-panel-width = <720>;
qcom,mdss-dsi-panel-height = <1280>;
qcom,mdss-dsi-h-front-porch = <52>;
qcom,mdss-dsi-h-back-porch = <100>;
qcom,mdss-dsi-h-pulse-width = <24>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <20>;
qcom,mdss-dsi-v-front-porch = <8>;
qcom,mdss-dsi-v-pulse-width = <4>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-on-command = [
39 01 00 00 00 00 04 b9 ff 83 94
39 01 00 00 00 00 03 ba 33 83
39 01 00 00 00 00 10 b1 6c 12 12
37 04 11 f1 80 ec 94 23 80 c0
d2 18
39 01 00 00 00 00 0c b2 00 64 0e
0d 32 23 08 08 1c 4d 00
39 01 00 00 00 00 0d b4 00 ff 03
50 03 50 03 50 01 6a 01 6a
39 01 00 00 00 00 02 bc 07
39 01 00 00 00 00 04 bf 41 0e 01
39 01 00 00 00 00 1f d3 00 07 00
00 00 10 00 32 10 05 00 00 32
10 00 00 00 32 10 00 00 00 36
03 09 09 37 00 00 37
39 01 00 00 00 00 2d d5 02 03 00
01 06 07 04 05 20 21 22 23 18
18 18 18 18 18 18 18 18 18 18
18 18 18 18 18 18 18 18 18 18
18 18 18 18 18 24 25 18 18 19
19
39 01 00 00 00 00 2d d6 05 04 07
06 01 00 03 02 23 22 21 20 18
18 18 18 18 18 58 58 18 18 18
18 18 18 18 18 18 18 18 18 18
18 18 18 18 18 25 24 19 19 18
18
39 01 00 00 00 00 02 cc 09
39 01 00 00 00 00 03 c0 30 14
39 01 00 00 00 00 05 c7 00 c0 40 c0
39 01 00 00 00 00 03 b6 43 43
05 01 00 00 c8 00 02 11 00
05 01 00 00 0a 00 02 29 00
];
qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00
05 01 00 00 00 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <1>;
qcom,mdss-dsi-traffic-mode = "burst_mode";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-panel-timings = [
79 1a 12 00 3e 42
16 1e 15 03 04 00
];
qcom,mdss-dsi-t-clk-post = <0x04>;
qcom,mdss-dsi-t-clk-pre = <0x1b>;
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
qcom,mdss-dsi-reset-sequence = <1 20>, <0 1>, <1 20>;
qcom,mdss-pan-physical-width-dimension = <59>;
qcom,mdss-pan-physical-height-dimension = <104>;
};
};

240
arch/arm64/boot/dts/vendor/qcom/display/dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi vendored Executable file
View File

@ -0,0 +1,240 @@
&mdss_mdp {
dsi_nt35597_truly_dsc_cmd: qcom,mdss_dsi_nt35597_dsc_cmd_truly {
qcom,mdss-dsi-panel-name =
"nt35597 cmd mode dsi truly panel with DSC";
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
qcom,dsi-ctrl-num = <1>;
qcom,dsi-phy-num = <1>;
qcom,dsi-select-clocks = "src_byte_clk1", "src_pixel_clk1";
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-pan-physical-width-dimension = <74>;
qcom,mdss-pan-physical-height-dimension = <131>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-panel-hdr-enabled;
qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
17000 15500 30000 8000 3000>;
qcom,mdss-dsi-panel-peak-brightness = <4200000>;
qcom,mdss-dsi-panel-blackness-level = <3230>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,adjust-timer-wakeup-ms = <1>;
qcom,mdss-dsi-te-pin-select = <1>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-width = <1440>;
qcom,mdss-dsi-panel-height = <2560>;
qcom,mdss-dsi-h-front-porch = <100>;
qcom,mdss-dsi-h-back-porch = <32>;
qcom,mdss-dsi-h-pulse-width = <16>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <8>;
qcom,mdss-dsi-v-front-porch = <10>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-panel-jitter = <0x1 0x1>;
qcom,mdss-dsi-on-command = [
/* CMD2_P0 */
15 01 00 00 00 00 02 ff 20
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 01
15 01 00 00 00 00 02 01 55
15 01 00 00 00 00 02 02 45
15 01 00 00 00 00 02 05 40
15 01 00 00 00 00 02 06 19
15 01 00 00 00 00 02 07 1e
15 01 00 00 00 00 02 0b 73
15 01 00 00 00 00 02 0c 73
15 01 00 00 00 00 02 0e b0
15 01 00 00 00 00 02 0f ae
15 01 00 00 00 00 02 11 b8
15 01 00 00 00 00 02 13 00
15 01 00 00 00 00 02 58 80
15 01 00 00 00 00 02 59 01
15 01 00 00 00 00 02 5a 00
15 01 00 00 00 00 02 5b 01
15 01 00 00 00 00 02 5c 80
15 01 00 00 00 00 02 5d 81
15 01 00 00 00 00 02 5e 00
15 01 00 00 00 00 02 5f 01
15 01 00 00 00 00 02 72 31
15 01 00 00 00 00 02 68 03
/* CMD2_P4 */
15 01 00 00 00 00 02 ff 24
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 1c
15 01 00 00 00 00 02 01 0b
15 01 00 00 00 00 02 02 0c
15 01 00 00 00 00 02 03 01
15 01 00 00 00 00 02 04 0f
15 01 00 00 00 00 02 05 10
15 01 00 00 00 00 02 06 10
15 01 00 00 00 00 02 07 10
15 01 00 00 00 00 02 08 89
15 01 00 00 00 00 02 09 8a
15 01 00 00 00 00 02 0a 13
15 01 00 00 00 00 02 0b 13
15 01 00 00 00 00 02 0c 15
15 01 00 00 00 00 02 0d 15
15 01 00 00 00 00 02 0e 17
15 01 00 00 00 00 02 0f 17
15 01 00 00 00 00 02 10 1c
15 01 00 00 00 00 02 11 0b
15 01 00 00 00 00 02 12 0c
15 01 00 00 00 00 02 13 01
15 01 00 00 00 00 02 14 0f
15 01 00 00 00 00 02 15 10
15 01 00 00 00 00 02 16 10
15 01 00 00 00 00 02 17 10
15 01 00 00 00 00 02 18 89
15 01 00 00 00 00 02 19 8a
15 01 00 00 00 00 02 1a 13
15 01 00 00 00 00 02 1b 13
15 01 00 00 00 00 02 1c 15
15 01 00 00 00 00 02 1d 15
15 01 00 00 00 00 02 1e 17
15 01 00 00 00 00 02 1f 17
/* STV */
15 01 00 00 00 00 02 20 40
15 01 00 00 00 00 02 21 01
15 01 00 00 00 00 02 22 00
15 01 00 00 00 00 02 23 40
15 01 00 00 00 00 02 24 40
15 01 00 00 00 00 02 25 6d
15 01 00 00 00 00 02 26 40
15 01 00 00 00 00 02 27 40
/* Vend */
15 01 00 00 00 00 02 e0 00
15 01 00 00 00 00 02 dc 21
15 01 00 00 00 00 02 dd 22
15 01 00 00 00 00 02 de 07
15 01 00 00 00 00 02 df 07
15 01 00 00 00 00 02 e3 6D
15 01 00 00 00 00 02 e1 07
15 01 00 00 00 00 02 e2 07
/* UD */
15 01 00 00 00 00 02 29 d8
15 01 00 00 00 00 02 2a 2a
/* CLK */
15 01 00 00 00 00 02 4b 03
15 01 00 00 00 00 02 4c 11
15 01 00 00 00 00 02 4d 10
15 01 00 00 00 00 02 4e 01
15 01 00 00 00 00 02 4f 01
15 01 00 00 00 00 02 50 10
15 01 00 00 00 00 02 51 00
15 01 00 00 00 00 02 52 80
15 01 00 00 00 00 02 53 00
15 01 00 00 00 00 02 56 00
15 01 00 00 00 00 02 54 07
15 01 00 00 00 00 02 58 07
15 01 00 00 00 00 02 55 25
/* Reset XDONB */
15 01 00 00 00 00 02 5b 43
15 01 00 00 00 00 02 5c 00
15 01 00 00 00 00 02 5f 73
15 01 00 00 00 00 02 60 73
15 01 00 00 00 00 02 63 22
15 01 00 00 00 00 02 64 00
15 01 00 00 00 00 02 67 08
15 01 00 00 00 00 02 68 04
/* Resolution:1440x2560*/
15 01 00 00 00 00 02 72 02
/* mux */
15 01 00 00 00 00 02 7a 80
15 01 00 00 00 00 02 7b 91
15 01 00 00 00 00 02 7c D8
15 01 00 00 00 00 02 7d 60
15 01 00 00 00 00 02 7f 15
15 01 00 00 00 00 02 75 15
/* ABOFF */
15 01 00 00 00 00 02 b3 C0
15 01 00 00 00 00 02 b4 00
15 01 00 00 00 00 02 b5 00
/* Source EQ */
15 01 00 00 00 00 02 78 00
15 01 00 00 00 00 02 79 00
15 01 00 00 00 00 02 80 00
15 01 00 00 00 00 02 83 00
/* FP BP */
15 01 00 00 00 00 02 93 0a
15 01 00 00 00 00 02 94 0a
/* Inversion Type */
15 01 00 00 00 00 02 8a 00
15 01 00 00 00 00 02 9b ff
/* IMGSWAP =1 @PortSwap=1 */
15 01 00 00 00 00 02 9d b0
15 01 00 00 00 00 02 9f 63
15 01 00 00 00 00 02 98 10
/* FRM */
15 01 00 00 00 00 02 ec 00
/* CMD1 */
15 01 00 00 00 00 02 ff 10
/* VESA DSC PPS settings
* (1440x2560 slide 16H)
*/
39 01 00 00 00 00 11 c1 09
20 00 10 02 00 02 68 01 bb
00 0a 06 67 04 c5
39 01 00 00 00 00 03 c2 10 f0
/* C0h = 0x0(2 Port SDC)
* 0x01(1 PortA FBC)
* 0x02(MTK) 0x03(1 PortA VESA)
*/
15 01 00 00 00 00 02 c0 03
/* VBP+VSA=,VFP = 10H */
15 01 00 00 00 00 04 3b 03 0a 0a
/* FTE on */
15 01 00 00 00 00 02 35 00
/* EN_BK =1(auto black) */
15 01 00 00 00 00 02 e5 01
/* CMD mode(10) VDO mode(03) */
15 01 00 00 00 00 02 bb 10
/* Non Reload MTP */
15 01 00 00 00 00 02 fb 01
/* SlpOut + DispOn */
05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00
];
qcom,mdss-dsi-off-command = [05 01 00 00 78 00
02 28 00 05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_hs_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,compression-mode = "dsc";
qcom,mdss-dsc-slice-height = <16>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <2>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
};
};
};

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